參數(shù)資料
型號: LTC1659
廠商: Linear Technology Corporation
英文描述: 12-Bit Rail-to-Rail Micropower DAC in MSOP Package(12位,微功耗滿幅度電壓輸出數(shù)模轉換器(8腳MSOP封裝))
中文描述: 12位軌至軌微DAC,采用MSOP封裝(12位,微功耗滿幅度電壓輸出數(shù)模轉換器(八腳型MSOP封裝))
文件頁數(shù): 4/12頁
文件大?。?/td> 102K
代理商: LTC1659
4
LTC1659
Note 3:
Load is 5k
in parallel with 100pF.
Note 4:
DAC switched between all 1s and the code corresponding to V
OS
for the part.
Note 5:
Digital inputs at 0V or V
CC
.
Note 6:
V
OUT
can only swing from (GND +
V
OS
) to (V
CC
V
OS
) when
output is unloaded.
Note 7:
Guaranteed by design. Not subject to test.
The
G
denotes specifications which apply over the full operating
temperature range.
Note 1:
The LTC1659CMS8 is designed, characterized and expected to
meet industrial temperature limits, but is not tested at –40
°
C and 85
°
C.
Consult factory for guaranteed I-grade MSOP parts. However, these parts
are guaranteed for commercial temperature limits of 0
°
C to 70
°
C.
Note 2:
Nonlinearity is defined from code 20 to code 4095 (full scale). See
Applications Information.
V
CC
= 2.7V to 5.5V, V
OUT
unloaded, REF
V
CC
, T
A
= T
MIN
to T
MAX
, unless otherwise noted.
ELECTRICAL CHARACTERISTICS
SYMBOL
Switching (V
CC
= 4.5 to 5.5V)
t
1
D
IN
Valid to CLK Setup
t
2
D
IN
Valid to CLK Hold
t
3
CLK High Time
t
4
CLK Low Time
t
5
CS/LD Pulse Width
t
6
LSB CLK to CS/LD
t
7
CS/LD Low to CLK
t
8
D
OUT
Output Delay
t
9
CLK Low to CS/LD Low
Switching (V
CC
= 2.7 to 5.5V)
t
1
D
IN
Valid to CLK Setup
t
2
D
IN
Valid to CLK Hold
t
3
CLK High Time
t
4
CLK Low Time
t
5
CS/LD Pulse Width
t
6
LSB CLK to CS/LD
t
7
CS/LD Low to CLK
t
8
D
OUT
Output Delay
t
9
CLK Low to CS/LD Low
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
G
40
0
40
40
50
40
20
5
20
ns
ns
ns
ns
ns
ns
ns
ns
ns
G
(Note 7)
(Note 7)
(Note 7)
(Note 7)
(Note 7)
C
LOAD
= 15pF
(Note 7)
G
G
G
G
G
G
150
G
G
60
0
60
60
80
60
30
10
30
ns
ns
ns
ns
ns
ns
ns
ns
ns
G
(Note 7)
(Note 7)
(Note 7)
(Note 7)
(Note 7)
C
LOAD
= 15pF
(Note 7)
G
G
G
G
G
G
220
G
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