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參數(shù)資料
| 型號： | LTC1608 |
| 廠商： | Linear Technology Corporation |
| 元件分類： | 串行ADC |
| 英文描述： | 8-Bit, 45.5 kSPS ADC Serial Out, Low Power, Compatible to TLC540/545/1540, Single Ch. 8-SOIC |
| 中文描述： | 高速，16位，500ksps與關(guān)機采樣A / D轉(zhuǎn)換器 |
| 文件頁數(shù)： | 4/20頁 |
| 文件大小： | 1000K |
| 代理商： | LTC1608 |
4
LTC1608
POWER REQUIREW
otherwise specifications are at T
A
= 25
°
C. (Note 5)
U
The
G
denotes specifications that apply over the full operating temperature range,
SYMBOL
V
DD
V
SS
I
DD
PARAMETER
Positive Supply Voltage
Negative Supply Voltage
Positive Supply Current
Nap Mode
Sleep Mode
Negative Supply Current
Nap Mode
Sleep Mode
Power Dissipation
Nap Mode
Sleep Mode
CONDITIONS
(Notes 12, 13)
(Note 12)
CS = RD = 0V
CS = 0V, SHDN = 0V
CS = 5V, SHDN = 0V
CS = RD = 0V
CS = 0V, SHDN = 0V
CS = 5V, SHDN = 0V
CS = RD = 0V
CS = 0V, SHDN = 0V
CS = 5V, SHDN = 0V
MIN
4.75
–4.75
TYP
MAX
5.25
–5.25
35
2.4
100
49
100
100
420
12
1
UNITS
V
V
G
22
1.5
1
32
1
1
270
7.5
0.01
mA
mA
μ
A
mA
μ
A
μ
A
mW
mW
mW
I
SS
G
P
D
G
TIW
otherwise specifications are at T
A
= 25
°
C. (Note 5)
The
G
denotes specifications that apply over the full operating temperature range,
SYMBOL
f
SMPL(MAX)
t
CONV
t
ACQ
t
ACQ+CONV(MIN)
Throughput Time (Acquisition + Conversion)
t
1
CS to RD Setup Time
t
2
CS
↓
to CONVST
↓
Setup Time
t
3
SHDN
↓
to CS
↑
Setup Time
t
4
SHDN
↑
to CONVST
↓
Wake-Up Time
t
5
CONVST Low Time
t
6
CONVST to BUSY Delay
PARAMETER
Maximum Sampling Frequency
Conversion Time
Acquisition Time
CONDITIONS
MIN
500
1.0
TYP
600
1.45
MAX
UNITS
kHz
G
G
1.8
400
2
μ
s
ns
μ
s
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
(Notes 11, 14)
G
G
1.67
(Notes 11, 12, 15)
(Notes 11, 12)
(Notes 11, 12)
CS = Low (Note 12)
(Note 12)
C
L
= 25pF
G
0
G
10
10
G
400
G
40
36
G
80
t
7
Data Ready Before BUSY
↑
60
G
32
200
–5
t
8
t
9
t
10
Delay Between Conversions
Wait Time RD
↓
After BUSY
↑
Data Access Time After RD
↓
(Note 12)
(Note 12)
C
L
= 25pF
G
G
25
40
50
60
75
50
60
G
C
L
= 100pF (Note 11)
45
G
t
11
Bus Relinquish Time
30
G
t
12
t
13
t
14
RD Low Time
CONVST High Time
Aperture Delay of Sample-and-Hold
(Note 12)
(Note 12)
G
t
10
40
G
2
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2:
All voltage values are with respect to ground with DGND, OGND
and AGND wired together unless otherwise noted.
Note 3:
When these pin voltages are taken below V
SS
or above V
DD
, they
will be clamped by internal diodes. This product can handle input currents
greater than 100mA below V
SS
or above V
DD
without latchup.
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