參數(shù)資料
型號: LTC1453IS8#TR
廠商: Linear Technology
文件頁數(shù): 10/12頁
文件大?。?/td> 0K
描述: IC DAC 12BIT R-R SINGLE 3V 8SOIC
標準包裝: 2,500
設置時間: 14µs
位數(shù): 12
數(shù)據(jù)接口: 串行
轉換器數(shù)目: 1
電壓電源: 單電源
功率耗散(最大): 750µW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應商設備封裝: 8-SOIC
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 1 電壓,單極;1 電壓,雙極
采樣率(每秒): *
7
LTC1451
LTC1452/LTC1453
sn145123 145123fas
Resolution (n): Resolution is defined as the number of
digital input bits, n. It defines the number of DAC output
states (2n) that divide the full-scale range. The resolution
does not imply linearity.
Full-Scale Voltage (VFS): This is the output of the DAC
when all bits are set to 1.
Voltage Offset Error (VOS): Normally, DAC offset is the
voltage at the output when the DAC is loaded with all zeros.
The DAC can have a true negative offset, but because the
part is operated from a single supply, the output cannot go
below zero. If the offset is negative, the output will remain
near 0V resulting in the transfer curve shown in Figure 1.
The offset of the part is measured at the code that corre-
sponds to the maximum offset specification:
VOS = VOUT – [(Code × VFS)/(2n – 1)]
Least Significant Bit (LSB): One LSB is the ideal voltage
difference between two successive codes.
LSB = (VFS – VOS)/(2n – 1) = (VFS – VOS)/4095
Nominal LSBs:
LTC1451
LSB = 4.095V/4095 = 1mV
LTC1452
LSB = V(REF)/4095
LTC1453
LSB = 2.5V/4095 = 0.610mV
Integral Nonlinearity (INL): End-point INL is the maxi-
mum deviation from a straight line passing through the
end-points of the DAC transfer curve. Because the part
operates from a single supply and the output cannot go
below zero, the linearity is measured between full scale
and the code corresponding to the maximum offset speci-
fication. The INL error at a given input code is calculated
as follows:
INL
= [VOUT – VOS – (VFS – VOS)(code/4095)]/LSB
VOUT = The output voltage of the DAC measured at
the given input code
Differential Nonlinearity (DNL): DNL is the difference
between the measured change and the ideal 1LSB change
between any two adjacent codes. The DNL error between
any two codes is calculated as follows:
DNL
= (
VOUT – LSB)/LSB
VOUT = The measured voltage difference between
two adjacent codes
Digital Feedthrough: The glitch that appears at the analog
output caused by AC coupling from the digital inputs when
they change state. The area of the glitch is specified in
nV
× sec.
DAC CODE
1451/2/3 F01
OUTPUT
VOLTAGE
NEGATIVE
OFFSET
0V
Figure 1. Effect of Negative Offset
DEFI ITIO S
UU
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