fSAMPLE(MAX)
參數資料
型號: LTC1414CGN#TR
廠商: Linear Technology
文件頁數: 15/20頁
文件大小: 0K
描述: IC ADC 14BIT 2.2MSPS SMPL 28SSOP
標準包裝: 2,500
位數: 14
采樣率(每秒): 2.2M
數據接口: 并聯
轉換器數目: 1
功率耗散(最大): 230mW
電壓電源: 雙 ±
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 28-SSOP(0.154",3.90mm 寬)
供應商設備封裝: 28-SSOP
包裝: 帶卷 (TR)
輸入數目和類型: 2 個單端,雙極;1 個差分,雙極
4
LTC1414
TI I G CHARACTERISTICS
W U
(Note 5)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
fSAMPLE(MAX)
Maximum Sampling Frequency
q
2.2
MHz
tCONV
Conversion Time
q
220
330
400
ns
tACQ
Acquisition Time
q
40
100
ns
tTHROUGHPUT
Throughput Time (Acquisition + Conversion)
q
370
454
ns
t1
CONVST to BUSY Delay
CL = 25pF
10
ns
t2
Data Ready Before BUSY
±20
ns
t3
Delay Between Conversions
(Note 9)
q
100
ns
t4
CONVST Low Time
(Note 10)
q
40
ns
t5
CONVST High Time
(Note 10)
q
40
ns
t6
Aperture Delay of Sample-and-Hold
– 1
ns
The q denotes specifications which apply over the full operating
temperature range; all other limits and typicals TA = 25°C.
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: All voltage values are with respect to ground with DGND and
AGND wired together (unless otherwise noted).
Note 3: When these pin voltages are taken below VSS or above VDD, they
will be clamped by internal diodes. This product can handle input currents
greater than 100mA below VSS or above VDD without latchup.
Note 4: When these pin voltages are taken below VSS, they will be clamped
by internal diodes. This product can handle input currents greater than
100mA below VSS without latchup. These pins are not clamped to VDD.
Note 5: VDD = 5V, VSS = – 5V, fSAMPLE = 2.2MHz and tr = tf = 5ns unless
otherwise specified.
Note 6: Linearity, offset and full-scale specifications apply for a single-
ended AIN+ input with AIN– grounded.
Note 7: Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 8: Bipolar offset is the offset voltage measured from – 0.5LSB
when the output code flickers between 0000 0000 0000 00 and
1111 1111 1111 11.
Note 9: Recommended operating conditions.
Note 10: The falling CONVST edge starts a conversion. If CONVST returns
high at a critical point during the conversion it can create small errors. For
best results ensure that CONVST returns high either within 225ns after the
start of the conversion or after BUSY rises.
TYPICAL PERFOR A CE CHARACTERISTICS
UW
Signal-to-Noise Ratio vs Input
Frequency
INPUT FREQUENCY (Hz)
10k
SIGNAL-TO-NOISE
RATIO
(dB)
90
80
70
60
50
40
30
20
10
0
100k
1M
10M
1414 G02
INPUT FREQUENCY (Hz)
10k
DISTORTION
(dB)
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
100k
1M
10M
1414 G03
2nd
THD
3rd
INPUT FREQUENCY (Hz)
EFFECTIVE
BITS
S/(N
+
D)
(dB)
10k
100k
1M
10M
1414 TA02
1k
14
13
12
11
10
9
8
7
6
5
4
3
2
86
80
74
68
fSAMPLE = 2.2MHz
S/(N + D) vs Input Frequency
Distortion vs Input Frequency
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