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參數(shù)資料
| 型號： | LTC1412 |
| 廠商： | Linear Technology Corporation |
| 英文描述： | 12-Bit, 3Msps, Sampling A/D Converter |
| 中文描述： | 12位，3Msps，采樣A / D轉(zhuǎn)換器 |
| 文件頁數(shù)： | 8/16頁 |
| 文件大小： | 499K |
| 代理商： | LTC1412 |
8
LTC1412
APPLICATIO
S I
N
FOR
ATIO
U
C
SAMPLE+
A
IN+
HOLD
W
U
COMP
C
DAC–
D11
D0
ZEROING SWITCHES
HOLD
HOLD
A
IN–
C
DAC+
C
SAMPLE–
12
1412 F01
+
–
OUTPUT
LATCHES
V
DAC+
V
DAC–
SAMPLE
SAMPLE
HOLD
SAR
Figure 1. Simplified Block Diagram
FREQUENCY (kHz)
0
200
400
600
800 1000 1200 1400
–120
A
–100
–80
–60
–40
0
1412 F02a
–20
f
SMPL
= 3Msps
f
SFDR = 93.3dB
SINAD = 73dB
Figure 2a. LTC1412 Nonaveraged, 4096 Point FFT,
Input Frequency = 100kHz
FREQUENCY (kHz)
0
200
400
600
800 1000 1200 1400
–120
A
–100
–80
–60
–40
0
1412 F02B
–20
f
SMPL
= 3Msps
f
SFDR = 83dB
SINAD = 72.5dB
SNR = 73db
Figure 2b. LTC1412 Nonaveraged, 4096 Point FFT,
Input Frequency = 1.45MHz
to frequencies from above DC and below half the sampling
frequency. Figure 2 shows a typical spectral content with
a 3MHz sampling rate and a 100kHz input. The dynamic
performance is excellent for input frequencies up to and
beyond the Nyquist limit of 1.5MHz.
Effective Number of Bits
The Effective Number of Bits (ENOBs) is a measurement of
the resolution of an ADC and is directly related to the
S/(N + D) by the equation:
N = [S/(N + D) – 1.76]/6.02
where N is the effective number of bits of resolution and
S/(N + D) is expressed in dB. At the maximum sampling
rate of 3MHz the LTC1412 maintains near ideal ENOBs up
to the Nyquist input frequency of 1.5MHz. Refer to
Figure 3.
sample-and-hold capacitors to acquire the analog signal.
During the convert phase the comparator zeroing switches
open, putting the comparator into compare mode. The
input switches connect the C
SAMPLE
capacitors to ground,
transferring the differential analog input charge onto the
summing junction. This input charge is successively com-
pared with the binary-weighted charges supplied by the
differential capacitive DAC. Bit decisions are made by the
high speed comparator. At the end of a conversion, the
differential DAC output balances the A
IN+
and A
IN–
input
charges. The SAR contents (a 12-bit data word) which
represents the difference of A
IN+
and A
IN–
are loaded into
the 12-bit output latches.
Dynamic Performance
The LTC1412 has excellent high speed sampling capabil-
ity. FFT (Fast Four Transform) test techniques are used to
test the ADC’s frequency response, distortion and noise at
the rated throughput. By applying a low distortion sine
wave and analyzing the digital output using an FFT algo-
rithm, the ADC’s spectral content can be examined for
frequencies outside the fundamental. Figure 2 shows a
typical LTC1412 FFT plot.
Signal-to-Noise Ratio
The signal-to-noise plus distortion ratio [S/(N + D)] is the
ratio between the RMS amplitude of the fundamental input
frequency to the RMS amplitude of all other frequency
components at the A/D output. The output is band limited
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| LTC1412C | 12-Bit, 3Msps, Sampling A/D Converter |
| LTC1412CG | 12-Bit, 3Msps, Sampling A/D Converter |
| LTC1412I | 12-Bit, 3Msps, Sampling A/D Converter |
| LTC1412IG | 12-Bit, 3Msps, Sampling A/D Converter |
| LTC1414 | 14-Bit, 2.2Msps, Sampling A/D Converter |
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