參數(shù)資料
型號(hào)： LTC1296DCSW
廠商： Linear Technology
文件頁數(shù)： 9/28頁
文件大小： 0K
描述： IC DATA ACQ SYSTEM 12BIT 20-SOIC
標(biāo)準(zhǔn)包裝： 38
類型： 數(shù)據(jù)采集系統(tǒng)（DAS），ADC
分辨率（位）： 12 b
采樣率（每秒）： 46.5k
數(shù)據(jù)接口： 串行，并聯(lián)
電壓電源： 雙 ±
電源電壓： ±5V，5V
工作溫度： 0°C ~ 70°C
安裝類型： 表面貼裝
封裝/外殼： 20-SOIC（0.295"，7.50mm 寬）
供應(yīng)商設(shè)備封裝： 20-SOIC
包裝： 管件
其它名稱： LTC1296DCS
17
LTC1293/LTC1294/LTC1296
129346fs
Sharing the Serial Interface
The LTC1293/4/6 can share the same 3-wire serial inter-
face with other peripheral components or other LTC1293/
4/6’s (Figure 3). Now, the CS signals decide which LTC1293/
4/6 is being addressed by the MPU.
ANALOG CONSIDERATIONS
Grounding
The LTC1293/4/6 should be used with an analog ground
plane and single point grounding techniques. Do not use
wire wrapping techniques to breadboard and evaluate the
U
S
A
O
PPLICATI
WU
U
I FOR ATIO
CLR
P1.3
CLK GOES LOW
CLR
A
CLEAR ACC
RLC
A
ROTATE DATA BIT (B3) INTO ACC
MOV
C,P1.2
READ DATA BIT INTO CARRY
RLC
A
ROTATE DATA BIT (B2) INTO ACC
SETB
P1.3
CLK GOES HIGH
CLR
P1.3
CLK GOES LOW
MOV
C,P1.2
READ DATA BIT INTO CARRY
RLC
A
ROTATE DATA BIT (B1) INTO ACC
SETB
P1.3
CLK GOES HIGH
CLR
P1.3
CLK GOES LOW
MOV
C,P1.2
READ DATA BIT INTO CARRY
SETB
P1.4
CS GOES HIGH
RRC
A
ROTATE DATA BIT (B0) INTO ACC
RRC
A
ROTATE RIGHT INTO ACC
RRC
A
ROTATE RIGHT INTO ACC
RRC
A
ROTATE RIGHT INTO ACC
MOV
R3,A
STORE LSBs IN R3
AJMP
CONT
START NEXT CONVERSION
LABEL MNEMONIC
OPERAND
COMMENTS
SETB
P1.4
CS GOES HIGH
CONT
MOV
A,#87H
DIN WORD FOR LTC1294
CLR
P1.4
CS GOES LOW
MOV
R4,#08H
LOAD COUNTER
LOOP1 RLC
A
ROTATE DIN BIT INTO CARRY
CLR
P1.3
CLK GOES LOW
MOV
P1.2,C
OUTPUT DIN BIT TO LTC1294
SETB
P1.3
CLK GOES HIGH
DJNZ
R4,LOOP1
NEXT DIN BIT
MOV
P1,#04H
P1.2 BECOMES AN INPUT
CLR
P1.3
CLK GOES LOW
MOV
R4,#09H
LOAD COUNTER
LOOP
MOV
C,P1.2
READ DATA BIT INTO CARRY
RLC
A
ROTATE DATA BIT (B3) INTO ACC
SETB
P1.3
CLK GOES HIGH
CLR
P1.3
CLK GOES LOW
DJNZ
R4,LOOP
NEXT DOUT BIT
MOV
R2,A
STORE MSBs IN R2
MOV
C,P1.2
READ DATA BIT INTO CARRY
SETB
P1.3
CLK GOES HIGH
LABEL MNEMONIC
OPERAND
COMMENTS
8051 CODE
8 CHANNELS
3
3-WIRE SERIAL
INTERFACE TO OTHER
PERIPHERALS OR LTC1293/4/6s
2
10
OUTPUT PORT
SERIAL DATA
MPU
LTC1293 F03
LTC1294
CS
LTC1294
CS
LTC1294
CS
Figure 3. Several LTC1294 Sharing One 3-Wire Serial Interface
device. To achieve the optimum performance use a PC
board. The analog ground pin (AGND) should be tied
directly to the ground plane with minimum lead length (a
low profile socket is fine). The digital ground pin (DGND)
also can be tied directly to this ground pin because
minimal digital noise is generated within the chip itself.
VCC should be bypassed to the ground plane with a 22F
(minimum value) tantalum with leads as short as possible
and as close as possible to the pin. A 0.1
F ceramic disk
also should be placed in parallel with the 22
F and again
with leads as short as possible and as close to VCC as
possible. AVCC and DVCC should be tied together on the
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