VIH High Level Input V" />
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� LTC1296CCN
寤犲晢锛� Linear Technology
鏂囦欢闋佹暩(sh霉)锛� 23/28闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC DATA ACQ SYSTEM 12BIT 20-DIP
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 18
椤炲瀷锛� 鏁�(sh霉)鎿�(j霉)閲囬泦绯荤当(t菕ng)锛圖AS锛�锛孉DC
鍒嗚鲸鐜囷紙浣嶏級锛� 12 b
閲囨ǎ鐜囷紙姣忕锛夛細 46.5k
鏁�(sh霉)鎿�(j霉)鎺ュ彛锛� 涓茶锛屽苟鑱�(li谩n)
闆诲闆绘簮锛� 闆� ±
闆绘簮闆诲锛� ±5V锛�5V
宸ヤ綔婧害锛� 0°C ~ 70°C
瀹夎椤炲瀷锛� 閫氬瓟
灏佽/澶栨锛� 20-DIP锛�0.300"锛�7.62mm锛�
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 20-PDIP
鍖呰锛� 绠′欢
4
LTC1293/LTC1294/LTC1296
129346fs
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VIH
High Level Input Voltage
VCC = 5.25V
鈼�
2.0
V
VIL
Low Level Input Voltage
VCC = 4.75V
鈼�
0.8
V
IIH
High Level Input Current
VIN = VCC
鈼�
2.5
A
IIL
Low Level Input Current
VIN = 0V
鈼�
鈥�2.5
A
VOH
High Level Output Voltage
VCC = 4.75V, IO = 鈥�10mA
4.7
V
IO = 360A
鈼�
2.4
4.0
VOL
Low Level Output Voltage
VCC = 4.75V, IO = 1.6mA
鈼�
0.4
V
IOZ
High Z Output Leakage
VOUT = VCC, CS High
鈼�
3
A
VOUT = 0V, CS High
鈼�
鈥�3
ISOURCE
Output Source Current
VOUT = 0V
鈥�20
mA
ISINK
Output Sink Current
VOUT = VCC
20
mA
ICC
Positive Supply Current
CS High
鈼�
612
mA
ICC
Positive Supply Current
CS High,
LTC1294BC, LTC1294CC,
鈼�
510
A
Power
LTC1294DC, LTC1294BI,
Shutdown
LTC1294CI, LTC1294DI,
CLK Off
LTC1294BM, LTC1294CM,
鈼�
515
A
LTC1294DM
IREF
Reference Current
CS High
鈼�
10
50
A
I
鈥�
Negative Supply Current
CS High
鈼�
150
A
ISOURCEs
SSO Source Current
VSSO = 0V
鈼�
0.8
1.5
mA
ISINKs
SSO Sink Current
VSSO = VCC
鈼�
0.5
1.0
mA
ELECTRICAL C
C
HARA TER STICS
DIGITAL A D
U
I
DC
(Note 3)
LTC1293/4/6B
LTC1293/4/6C
LTC1293/4/6D
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: All voltage values are with respect to DGND, AGND and REF
鈥� wired
together (unless otherwise noted).
Note 3: VCC = 5V, VREF+ = 5V, VREF鈥� = 0V, V
鈥� = 0V for unipolar mode and
鈥�5V for bipolar mode, CLK = 1.0MHz unless otherwise specified. The
鈼�
denotes specifications which apply over the full operating temperature
range; all other limits and typicals TA = 25
掳C.
Note 4: These specs apply for both unipolar and bipolar modes. In bipolar
mode, one LSB is equal to the bipolar input span (2VREF) divided by 4096.
For example, when VREF = 5V, 1LSB (bipolar) = 2 (5V)/4096 = 2.44mV.
Note 5: Linearity error is specified between the actual end points of the A/
D transfer curve. The deviation is measured from the center of the
quantization band.
Note 6: Recommended operating conditions.
Note 7: Two on-chip diodes are tied to each reference and analog input
which will conduct for reference or analog input voltages one diode drop
below V
鈥� or one diode drop above VCC. Be careful during testing at low
VCC levels (4.5V), as high level reference or analog inputs (5V) can cause
this input diode to conduct, especially at elevated temperatures, and cause
errors for inputs near full scale. This spec allows 50mV forward bias of
either diode. This means that as long as the reference or analog input
does not exceed the supply voltage by more than 50mV, the output code
will be correct. To achieve an absolute 0V to 5V input voltage range will
therefore require a minimum supply voltage of 4.950V over initial
tolerance, temperature variations and loading.
Note 8: Channel leakage current is measured after the channel selection.
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鐩搁棞(gu膩n)浠g悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉)
鍙冩暩(sh霉)鎻忚堪
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LTC1296CCSW 鍔熻兘鎻忚堪:IC DATA ACQ SYSTEM 12BIT 20-SOIC RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鏁�(sh霉)鎿�(j霉)閲囬泦 - ADCs/DAC - 灏堢敤鍨� 绯诲垪:- 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 妯�(bi膩o)婧�(zh菙n)鍖呰:50 绯诲垪:- 椤炲瀷:鏁�(sh霉)鎿�(j霉)閲囬泦绯荤当(t菕ng)锛圖AS锛� 鍒嗚鲸鐜囷紙浣嶏級:16 b 閲囨ǎ鐜囷紙姣忕锛�:21.94k 鏁�(sh霉)鎿�(j霉)鎺ュ彛:MICROWIRE?锛孮SPI?锛屼覆琛�锛孲PI? 闆诲闆绘簮:妯℃摤鍜屾暩(sh霉)瀛� 闆绘簮闆诲:1.8 V ~ 3.6 V 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:40-WFQFN 瑁搁湶鐒婄洡 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:40-TQFN-EP锛�6x6锛� 鍖呰:鎵樼洡
LTC1296CCSW#PBF 鍔熻兘鎻忚堪:IC DATA ACQ SYSTEM 12BIT 20-SOIC RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鏁�(sh霉)鎿�(j霉)閲囬泦 - ADCs/DAC - 灏堢敤鍨� 绯诲垪:- 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 妯�(bi膩o)婧�(zh菙n)鍖呰:50 绯诲垪:- 椤炲瀷:鏁�(sh霉)鎿�(j霉)閲囬泦绯荤当(t菕ng)锛圖AS锛� 鍒嗚鲸鐜囷紙浣嶏級:16 b 閲囨ǎ鐜囷紙姣忕锛�:21.94k 鏁�(sh霉)鎿�(j霉)鎺ュ彛:MICROWIRE?锛孮SPI?锛屼覆琛岋紝SPI? 闆诲闆绘簮:妯℃摤鍜屾暩(sh霉)瀛� 闆绘簮闆诲:1.8 V ~ 3.6 V 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:40-WFQFN 瑁搁湶鐒婄洡 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:40-TQFN-EP锛�6x6锛� 鍖呰:鎵樼洡
LTC1296CCSW#TR 鍔熻兘鎻忚堪:IC DATA ACQ SYS 12BIT 5V 20SOIC RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鏁�(sh霉)鎿�(j霉)閲囬泦 - ADCs/DAC - 灏堢敤鍨� 绯诲垪:- 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 妯�(bi膩o)婧�(zh菙n)鍖呰:50 绯诲垪:- 椤炲瀷:鏁�(sh霉)鎿�(j霉)閲囬泦绯荤当(t菕ng)锛圖AS锛� 鍒嗚鲸鐜囷紙浣嶏級:16 b 閲囨ǎ鐜囷紙姣忕锛�:21.94k 鏁�(sh霉)鎿�(j霉)鎺ュ彛:MICROWIRE?锛孮SPI?锛屼覆琛�锛孲PI? 闆诲闆绘簮:妯℃摤鍜屾暩(sh霉)瀛� 闆绘簮闆诲:1.8 V ~ 3.6 V 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:40-WFQFN 瑁搁湶鐒婄洡 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:40-TQFN-EP锛�6x6锛� 鍖呰:鎵樼洡
LTC1296CCSW#TRPBF 鍔熻兘鎻忚堪:IC DATA ACQ SYSTEM 12BIT 20-SOIC RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鏁�(sh霉)鎿�(j霉)閲囬泦 - ADCs/DAC - 灏堢敤鍨� 绯诲垪:- 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 妯�(bi膩o)婧�(zh菙n)鍖呰:50 绯诲垪:- 椤炲瀷:鏁�(sh霉)鎿�(j霉)閲囬泦绯荤当(t菕ng)锛圖AS锛� 鍒嗚鲸鐜囷紙浣嶏級:16 b 閲囨ǎ鐜囷紙姣忕锛�:21.94k 鏁�(sh霉)鎿�(j霉)鎺ュ彛:MICROWIRE?锛孮SPI?锛屼覆琛�锛孲PI? 闆诲闆绘簮:妯℃摤鍜屾暩(sh霉)瀛� 闆绘簮闆诲:1.8 V ~ 3.6 V 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:40-WFQFN 瑁搁湶鐒婄洡 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:40-TQFN-EP锛�6x6锛� 鍖呰:鎵樼洡