參數(shù)資料
型號: LTC1293
廠商: Linear Technology Corporation
英文描述: Single Chip 12-Bit Data Acquisition System(單片,12位數(shù)據(jù)采集系統(tǒng))
中文描述: 單芯片12位數(shù)據(jù)采集系統(tǒng)(單片,12位數(shù)據(jù)采集系統(tǒng))
文件頁數(shù): 13/28頁
文件大?。?/td> 403K
代理商: LTC1293
13
LTC1293/LTC1294/LTC1296
MSB-First/LSB-First (MSBF)
The output data of the LTC1293/4/6 is programmed for
MSB-first or LSB-first sequence using the MSB bit. When
the MSBF bit is a logical one, data will appear on the D
OUT
line in MSB-first format. Logical zeroes will be filled in
indefinitely following the last data bit to accommodate
longer word lengths required by some microprocessors.
When the MSBF bit is a logical zero, LSB first data will
follow the normal MSB first data on the D
OUT
line. In the
bipolar mode the sign bit will fill in after the MSB bit for
MSBF = 0 (see Operating Sequence).
Power Shutdowns (PS)
The power shutdown feature of the LTC1293/4/6 is acti-
vated by making the PS bit a logical zero. If CS remains low
after the PS bit has been received, a 12-bit D
OUT
word with
Example 2:
The same conditions as Example 1 except
COM = 1V. The resulting input span is 1V
IN
+
4V. Note
if IN
+
4V the resulting D
OUT
word is all 1’s. If IN
+
1V
then the resulting D
OUT
word is all 0’s.
Example 3:
Let V
CC
= 5V, V
= –5V, REF
+
= 4V, REF
= 1V
and COM = 1V. Bipolar mode of operation. The resulting
input span is –2V
IN
+
4V.
For differential input configurations with the same condi-
tions as in the above three examples the resulting input
spans are as follows:
Example 1 (Diff.):
IN
IN
+
IN
+ 3V.
Example 2 (Diff.):
IN
IN
+
IN
+ 3V.
Example 3 (Diff.):
IN
– 3V
IN
+
IN
+ 3V.
U
S
A
O
PPLICATI
U
U
Operating Sequence
Example: Differential Inputs (CH4
+
, CH5
), Unipolar Mode
LTC1293 AI05
MSB-FIRST DATA (MSBF = 0)
MSB-FIRST DATA (MSBF = 1)
t
CYC
CS
D
IN
D
OUT
START
SEL1
UNI
PS
SGL/
DIFF
ODD/
SIGN
MSBF
t
CONV
t
SMPL
SEL0
HI-Z
FILLED WITH ZEROES
DON'T CARE
CLK
DON'T
CARE
B0
B1
B11
CLK
DON'T
CARE
t
CYC
CS
D
IN
START
SEL1
UNI
PS
SGL/
DIFF
ODD/
SIGN
MSBF
SEL0
DON'T CARE
D
OUT
t
CONV
t
SMPL
HI-Z
B11
B1 B0 B1
B11
FILLED WITH
ZEROES
相關(guān)PDF資料
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