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| 鍨嬭櫉锛� | LTC1292CCN8#PBF |
| 寤犲晢锛� | Linear Technology |
| 鏂囦欢闋佹暩(sh霉)锛� | 23/24闋� |
| 鏂囦欢澶у皬锛� | 0K |
| 鎻忚堪锛� | IC DATA ACQ SYSTEM 12BIT 8-DIP |
| 妯欐簴鍖呰锛� | 50 |
| 椤炲瀷锛� | 鏁�(sh霉)鎿�(j霉)閲囬泦绯荤当(t菕ng)锛圖AS锛� |
| 鍒嗚鲸鐜囷紙浣嶏級锛� | 12 b |
| 閲囨ǎ鐜囷紙姣忕锛夛細 | 60k |
| 鏁�(sh霉)鎿�(j霉)鎺ュ彛锛� | 涓茶锛屽苟鑱�(li谩n) |
| 闆诲闆绘簮锛� | 鍠浕婧� |
| 闆绘簮闆诲锛� | 5V |
| 宸ヤ綔婧害锛� | 0°C ~ 70°C |
| 瀹夎椤炲瀷锛� | 閫氬瓟 |
| 灏佽/澶栨锛� | 8-DIP锛�0.300"锛�7.62mm锛� |
| 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 8-PDIP |
| 鍖呰锛� | 绠′欢 |
| 鐢�(ch菐n)鍝佺洰閷勯爜闈細 | 1346 (CN2011-ZH PDF) |
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8
LTC1292/LTC1297
12927fb
TEST CIRCUITS
Voltage Waveforms for ten
The LTC1292/LTC1297 are data acquisition components
which contain the following functional blocks:
1. 12-Bit Succesive Approximation Capacitive A/D
Converter
2. Differential Input
3. Sample-and-Hold (S/H)
4. Synchronous, Half-Duplex Serial Interface
5. Control and Timing Logic
DIGITAL CONSIDERATIONS
Serial Interface
The LTC1292/LTC1297 communicate with microproces-
sors and other external circuitry via a synchronous, half-
duplex, three-wire serial interface (see Operating Se-
quence). The clock (CLK) synchronizes the data transfer
with each bit being transmitted on the falling CLK edge.
The LTC1292/LTC1297 do not require a configuration
input word and have no DIN pin. They are permanently
configured to have a single differential input and to per-
form a unipolar conversion. A falling CS initiates data
transfer. To allow the LTC1297 to recover from the power
shutdown mode, tsuCS has to be met. Then the first CLK
pulse enables DOUT. After one null bit, the A/D conversion
result is output on the DOUT line with a MSB-first sequence
followed by a LSB-first sequence. With the half-duplex
serial interface the DOUT data is from the current conver-
sion. This provides easy interface to MSB-first or LSB-first
U
S
A
O
PPLICATI
WU
U
I FOR ATIO
serial ports. Bringing CS high resets the LTC1292/LTC1297
for the next data exchange and puts the LTC1297 into its
power shutdown mode.
Table 1. Microprocessor with Hardware Serial Interfaces
Compatible with the LTC1292/LTC1297**
DOUT
0.8V
ten
B11
CS
CLK
LTC1292/7 TC07
PART NUMBER
TYPE OF INTERFACE
Motorola
MC6805S2, S3
SPI
MC68HC11
SPI
MC68HC05
SPI
RCA
CDP68HC05
SPI
Hitachi
HD6305
SCI Synchronous
HD6301
SCI Synchronous
HD63701
SCI Synchronous
HD6303
SCI Synchronous
HD64180
SCI Synchronous
National Semiconductor
COP400 Family
MICROWIRE
COP800 Family
MCROWIRE/PLUS
NS8050U
MICROWIRE/PLUS
HPC16000 Family
MICROWIRE/PLUS
Texas Instruments
TMS7002
Serial Port
TMS7042
Serial Port
TMS70C02
Serial Port
TMS70C42
Serial Port
TMS32011*
Serial Port
TMS32020*
Serial Port
TMS370C050
SPI
* Requires external hardware
** Contact factory for interface information for processors not on this list
MICROWIRE and MICROWIRE/PLUS are trademarks of National
Semiconductor Corp.
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鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| LTC1292CIN8 | 鍔熻兘鎻忚堪:IC DATA ACQ SYSTEM 12BIT 8-DIP RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鏁�(sh霉)鎿�(j霉)閲囬泦 - ADCs/DAC - 灏堢敤鍨� 绯诲垪:- 鐢�(ch菐n)鍝佸煿瑷撴ā濉�:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 妯欐簴鍖呰:50 绯诲垪:- 椤炲瀷:鏁�(sh霉)鎿�(j霉)閲囬泦绯荤当(t菕ng)锛圖AS锛� 鍒嗚鲸鐜囷紙浣嶏級:16 b 閲囨ǎ鐜囷紙姣忕锛�:21.94k 鏁�(sh霉)鎿�(j霉)鎺ュ彛:MICROWIRE?锛孮SPI?锛屼覆琛�锛孲PI? 闆诲闆绘簮:妯℃摤鍜屾暩(sh霉)瀛� 闆绘簮闆诲:1.8 V ~ 3.6 V 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:40-WFQFN 瑁搁湶鐒婄洡 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:40-TQFN-EP锛�6x6锛� 鍖呰:鎵樼洡 |
| LTC1292CIN8#PBF | 鍔熻兘鎻忚堪:IC DATA ACQ SYSTEM 12BIT 8-DIP RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鏁�(sh霉)鎿�(j霉)閲囬泦 - ADCs/DAC - 灏堢敤鍨� 绯诲垪:- 鐢�(ch菐n)鍝佸煿瑷撴ā濉�:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 妯欐簴鍖呰:50 绯诲垪:- 椤炲瀷:鏁�(sh霉)鎿�(j霉)閲囬泦绯荤当(t菕ng)锛圖AS锛� 鍒嗚鲸鐜囷紙浣嶏級:16 b 閲囨ǎ鐜囷紙姣忕锛�:21.94k 鏁�(sh霉)鎿�(j霉)鎺ュ彛:MICROWIRE?锛孮SPI?锛屼覆琛�锛孲PI? 闆诲闆绘簮:妯℃摤鍜屾暩(sh霉)瀛� 闆绘簮闆诲:1.8 V ~ 3.6 V 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:40-WFQFN 瑁搁湶鐒婄洡 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:40-TQFN-EP锛�6x6锛� 鍖呰:鎵樼洡 |
| LTC1292DCN8 | 鍔熻兘鎻忚堪:IC DATA ACQ SYSTEM 12BIT 8-DIP RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鏁�(sh霉)鎿�(j霉)閲囬泦 - ADCs/DAC - 灏堢敤鍨� 绯诲垪:- 鐢�(ch菐n)鍝佸煿瑷撴ā濉�:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 妯欐簴鍖呰:50 绯诲垪:- 椤炲瀷:鏁�(sh霉)鎿�(j霉)閲囬泦绯荤当(t菕ng)锛圖AS锛� 鍒嗚鲸鐜囷紙浣嶏級:16 b 閲囨ǎ鐜囷紙姣忕锛�:21.94k 鏁�(sh霉)鎿�(j霉)鎺ュ彛:MICROWIRE?锛孮SPI?锛屼覆琛岋紝SPI? 闆诲闆绘簮:妯℃摤鍜屾暩(sh霉)瀛� 闆绘簮闆诲:1.8 V ~ 3.6 V 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:40-WFQFN 瑁搁湶鐒婄洡 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:40-TQFN-EP锛�6x6锛� 鍖呰:鎵樼洡 |
| LTC1292DCN8#PBF | 鍔熻兘鎻忚堪:IC DATA ACQ SYSTEM 12BIT 8-DIP RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鏁�(sh霉)鎿�(j霉)閲囬泦 - ADCs/DAC - 灏堢敤鍨� 绯诲垪:- 鐢�(ch菐n)鍝佸煿瑷撴ā濉�:Data Converter Basics 妯欐簴鍖呰:1 绯诲垪:- 椤炲瀷:闆绘鎺у埗 鍒嗚鲸鐜囷紙浣嶏級:12 b 閲囨ǎ鐜囷紙姣忕锛�:1M 鏁�(sh霉)鎿�(j霉)鎺ュ彛:涓茶锛屽苟鑱�(li谩n) 闆诲闆绘簮:鍠浕婧� 闆绘簮闆诲:2.7 V ~ 3.6 V锛�4.5 V ~ 5.5 V 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:100-TQFP 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:100-TQFP锛�14x14锛� 鍖呰:鍓垏甯� (CT) 鍏跺畠鍚嶇ū:296-18373-1 |
| LTC1292DIN8 | 鍔熻兘鎻忚堪:IC DATA ACQ SYSTEM 12BIT 8-DIP RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鏁�(sh霉)鎿�(j霉)閲囬泦 - ADCs/DAC - 灏堢敤鍨� 绯诲垪:- 鐢�(ch菐n)鍝佸煿瑷撴ā濉�:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 妯欐簴鍖呰:50 绯诲垪:- 椤炲瀷:鏁�(sh霉)鎿�(j霉)閲囬泦绯荤当(t菕ng)锛圖AS锛� 鍒嗚鲸鐜囷紙浣嶏級:16 b 閲囨ǎ鐜囷紙姣忕锛�:21.94k 鏁�(sh霉)鎿�(j霉)鎺ュ彛:MICROWIRE?锛孮SPI?锛屼覆琛�锛孲PI? 闆诲闆绘簮:妯℃摤鍜屾暩(sh霉)瀛� 闆绘簮闆诲:1.8 V ~ 3.6 V 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:40-WFQFN 瑁搁湶鐒婄洡 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:40-TQFN-EP锛�6x6锛� 鍖呰:鎵樼洡 |
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