- 鎮ㄧ従(xi脿n)鍦ㄧ殑浣嶇疆锛�璨疯常IC缍�(w菐ng) > PDF鐩寗9519 > LTC1290DCN#PBF (Linear Technology)IC DATA ACQ SYS 12BIT 20-DIP PDF璩囨枡涓嬭級
鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉(h脿o)锛� | LTC1290DCN#PBF |
| 寤犲晢锛� | Linear Technology |
| 鏂囦欢闋�(y猫)鏁�(sh霉)锛� | 28/32闋�(y猫) |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC DATA ACQ SYS 12BIT 20-DIP |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 18 |
| 椤炲瀷锛� | 鏁�(sh霉)鎿�(j霉)閲囬泦绯荤当(t菕ng)锛圖AS锛�锛孉DC |
| 鍒嗚鲸鐜囷紙浣嶏級锛� | 12 b |
| 閲囨ǎ鐜囷紙姣忕锛夛細 | 50k |
| 鏁�(sh霉)鎿�(j霉)鎺ュ彛锛� | 涓茶锛屽苟鑱�(li谩n) |
| 闆诲闆绘簮锛� | 闆� ± |
| 闆绘簮闆诲锛� | ±5 V锛�5 V |
| 宸ヤ綔婧害锛� | 0°C ~ 70°C |
| 瀹夎椤炲瀷锛� | 閫氬瓟 |
| 灏佽/澶栨锛� | 20-DIP锛�0.300"锛�7.62mm锛� |
| 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 20-PDIP |
| 鍖呰锛� | 绠′欢 |
| 鐢�(ch菐n)鍝佺洰閷勯爜(y猫)闈細 | 1346 (CN2011-ZH PDF) |
绗�1闋�(y猫)绗�2闋�(y猫)绗�3闋�(y猫)绗�4闋�(y猫)绗�5闋�(y猫)绗�6闋�(y猫)绗�7闋�(y猫)绗�8闋�(y猫)绗�9闋�(y猫)绗�10闋�(y猫)绗�11闋�(y猫)绗�12闋�(y猫)绗�13闋�(y猫)绗�14闋�(y猫)绗�15闋�(y猫)绗�16闋�(y猫)绗�17闋�(y猫)绗�18闋�(y猫)绗�19闋�(y猫)绗�20闋�(y猫)绗�21闋�(y猫)绗�22闋�(y猫)绗�23闋�(y猫)绗�24闋�(y猫)绗�25闋�(y猫)绗�26闋�(y猫)绗�27闋�(y猫)鐣�(d膩ng)鍓嶇28闋�(y猫)绗�29闋�(y猫)绗�30闋�(y猫)绗�31闋�(y猫)绗�32闋�(y猫)
5
LTC1290
1290fe
LTC1290B/LTC1290C/LTC1290D
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VIH
High Level Input Voltage
VCC = 5.25V
鈼�
2.0
V
VIL
Low Level Input Voltage
VCC = 4.75V
鈼�
0.8
V
IIH
High Level Input Current
VIN = VCC
鈼�
2.5
A
IIL
Low Level Input Current
VIN = 0V
鈼�
鈥� 2.5
A
VOH
High Level Output Voltage
VCC = 4.75V
IO = 10
A
4.7
V
IO = 360
A
鈼�
2.4
4.0
VOL
Low Level Output Voltage
VCC = 4.75V
IO = 1.6mA
鈼�
0.4
V
IOZ
High-Z Output Leakage
VOUT = VCC, CS High
鈼�
3
A
VOUT = 0V, CS High
鈼�
鈥�3
A
ISOURCE
Output Source Current
VOUT = 0V
鈥�20
mA
ISINK
Output Sink Current
VOUT = VCC
20
mA
ICC
Positive Supply Current
CS High
鈼�
612
mA
CS High
LTC1290BC, LTC1290CC
鈼�
510
A
Power Shutdown LTC1290DC, LTC1290BI
ACLK Off
LTC1290CI, LTC1290DI
LTC1290BM, LTC1290CM
鈼�
515
A
LTC1290DM
(OBSOLETE)
IREF
Reference Current
VREF = 5V
鈼�
10
50
A
I鈥�
Negative Supply Current
CS High
鈼�
150
A
VCC levels (4.5V), as high level reference or analog inputs (5V) can cause
this input diode to conduct, especially at elevated temperatures and cause
errors for inputs near full scale. This spec allows 50mV forward bias of
either diode. This means that as long as the reference or analog input does
not exceed the supply voltage by more than 50mV, the output code will be
correct. To achieve an absolute 0V to 5V input voltage range will therefore
require a minimum supply voltage of 4.950V over initial tolerance,
temperature variations and loading.
Note 8: Channel leakage current is measured after the channel selection.
Note 9: To minimize errors caused by noise at the chip select input, the
internal circuitry waits for two ACLK falling edge after a chip select falling
edge is detected before responding to control input signals. Therefore, no
attempt should be made to clock an address in or data out until the
minimum chip select setup time has elapsed.
Note 10: Increased leakage currents at elevated temperatures cause the
S/H to droop, therefore it's recommended that fACLK 鈮� 125kHz at 85掳C and
fACLK 鈮� 15kHz at 25掳C.
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: All voltage values are with respect to ground with DGND, AGND
and REF
鈥� wired together (unless otherwise noted).
Note 3: VCC = 5V, VREF+ = 5V, VREF 鈥� = 0V, V鈥� = 0V for unipolar mode and
鈥� 5V for bipolar mode, ACLK = 4.0MHz unless otherwise specified.
Note 4: These specs apply for both unipolar and bipolar modes. In bipolar
mode, one LSB is equal to the bipolar input span (2VREF) divided by 4096.
For example, when VREF = 5V, 1LSB (bipolar) = 2(5V)/4096 = 2.44mV.
Note 5: Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 6: Recommended operating conditions.
Note 7: Two on-chip diodes are tied to each reference and analog input
which will conduct for reference or analog input voltages one diode drop
below V 鈥� or one diode drop above VCC. Be careful during testing at low
ELECTRICAL C
C
HARA TER STICS
DIGITAL A D
U
I
DC
The
鈼� denotes the specifications which
apply over the full operating temperature range, otherwise specifications are at TA = 25掳C. (Note 3)
鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
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| CB3106A-32-17S | CONN PLUG 4POS STRAIGHT W/SCKT |
鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| LTC1290DCS | 鍒堕€犲晢:Linear Technology 鍔熻兘鎻忚堪:Dry Pack |
| LTC1290DCSW | 鍔熻兘鎻忚堪:IC DATA ACQ SYS 12BIT 20-SOIC RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鏁�(sh霉)鎿�(j霉)閲囬泦 - ADCs/DAC - 灏堢敤鍨� 绯诲垪:- 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 妯�(bi膩o)婧�(zh菙n)鍖呰:50 绯诲垪:- 椤炲瀷:鏁�(sh霉)鎿�(j霉)閲囬泦绯荤当(t菕ng)锛圖AS锛� 鍒嗚鲸鐜囷紙浣嶏級:16 b 閲囨ǎ鐜囷紙姣忕锛�:21.94k 鏁�(sh霉)鎿�(j霉)鎺ュ彛:MICROWIRE?锛孮SPI?锛屼覆琛�锛孲PI? 闆诲闆绘簮:妯℃摤鍜屾暩(sh霉)瀛� 闆绘簮闆诲:1.8 V ~ 3.6 V 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:40-WFQFN 瑁搁湶鐒婄洡 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:40-TQFN-EP锛�6x6锛� 鍖呰:鎵樼洡 |
| LTC1290DCSW#PBF | 鍔熻兘鎻忚堪:IC DATA ACQ SYS 12BIT 20-SOIC RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鏁�(sh霉)鎿�(j霉)閲囬泦 - ADCs/DAC - 灏堢敤鍨� 绯诲垪:- 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″:Data Converter Basics 妯�(bi膩o)婧�(zh菙n)鍖呰:1 绯诲垪:- 椤炲瀷:闆绘(j墨)鎺у埗 鍒嗚鲸鐜囷紙浣嶏級:12 b 閲囨ǎ鐜囷紙姣忕锛�:1M 鏁�(sh霉)鎿�(j霉)鎺ュ彛:涓茶锛屽苟鑱�(li谩n) 闆诲闆绘簮:鍠浕婧� 闆绘簮闆诲:2.7 V ~ 3.6 V锛�4.5 V ~ 5.5 V 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:100-TQFP 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:100-TQFP锛�14x14锛� 鍖呰:鍓垏甯� (CT) 鍏跺畠鍚嶇ū:296-18373-1 |
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| LTC1290DCSW#TRPBF | 鍔熻兘鎻忚堪:IC DATA ACQ SYS 12BIT 20-SOIC RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鏁�(sh霉)鎿�(j霉)閲囬泦 - ADCs/DAC - 灏堢敤鍨� 绯诲垪:- 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 妯�(bi膩o)婧�(zh菙n)鍖呰:50 绯诲垪:- 椤炲瀷:鏁�(sh霉)鎿�(j霉)閲囬泦绯荤当(t菕ng)锛圖AS锛� 鍒嗚鲸鐜囷紙浣嶏級:16 b 閲囨ǎ鐜囷紙姣忕锛�:21.94k 鏁�(sh霉)鎿�(j霉)鎺ュ彛:MICROWIRE?锛孮SPI?锛屼覆琛�锛孲PI? 闆诲闆绘簮:妯℃摤鍜屾暩(sh霉)瀛� 闆绘簮闆诲:1.8 V ~ 3.6 V 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:40-WFQFN 瑁搁湶鐒婄洡 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:40-TQFN-EP锛�6x6锛� 鍖呰:鎵樼洡 |
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