I
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� LTC1283CN#PBF
寤犲晢锛� Linear Technology
鏂囦欢闋佹暩(sh霉)锛� 19/24闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC DATA ACQ SYS 10BIT 3V 20-DIP
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 18
椤炲瀷锛� 鏁�(sh霉)鎿�(j霉)閲囬泦绯荤当(t菕ng)锛圖AS锛�
鍒嗚鲸鐜囷紙浣嶏級锛� 10 b
閲囨ǎ鐜囷紙姣忕锛夛細 15k
鏁�(sh霉)鎿�(j霉)鎺ュ彛锛� 涓茶锛屽苟鑱�(li谩n)
闆诲闆绘簮锛� 闆� ±
闆绘簮闆诲锛� ±3.3V锛�3 V ~ 3.6 V
宸ヤ綔婧害锛� 0°C ~ 70°C
瀹夎椤炲瀷锛� 閫氬瓟
灏佽/澶栨锛� 20-DIP锛�0.300"锛�7.62mm锛�
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 20-PDIP
鍖呰锛� 绠′欢
4
LTC1283
1283fb
ELECTRICAL C
C
HARA TER STICS
DIGITAL A D
U
I
DC
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
IOZ
Hi-Z Output Leakage
VOUT = VCC, CS High
鈼�
3
渭A
VOUT = 0V, CS High
鈼�
鈥�3
渭A
ISOURCE
Output Source Current
VOUT = 0V
鈥� 4.5
mA
ISINK
Output Sink Current
VOUT = VCC
4.5
mA
ICC
Positive Supply Current
CS High, REF + Open
鈼�
150
350
渭A
IREF
Reference Current
VREF = 2.5V
鈼�
250
500
渭A
I 鈥�
Negative Supply Current
CS High, V 鈥� = 鈥� 3V
鈼�
鈥�1
鈥� 50
渭A
LTC1283/LTC1283A
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All voltage values are with respect to ground with DGND, AGND
and REF 鈥� wired together (unless otherwise noted).
Note 3: VCC = 3V, VREF+ = 2.5V, VREF鈥� = 0V, V 鈥� = 0V for unipolar mode
and 鈥� 3V for bipolar mode, ACLK = 1MHz, SCLK = 0.25MHz unless
otherwise specified.
Note 4: These specifications apply for both unipolar and bipolar modes. In
bipolar mode, one LSB is equal to the bipolar input span (2VREF) divided
by 1024. For example, when VREF = 2.5V, 1LSB (bipolar) = 2(2.5V)/1024 =
4.88mV.
Note 5: Linearity error is the deviation from ideal of the slope between the
two end points of the transfer curve.
Note 6: Two on-chip diodes are tied to each reference and analog input
which will conduct for reference or analog input voltages one diode drop
below V 鈥� or one diode drop above VCC. Be careful during testing at low
VCC levels, as high level reference or analog inputs can cause this input
diode to conduct, especially at elevated temperatures, and cause errors for
inputs near full scale. This spec allows 50mV forward bias of either diode.
This means that as long as the reference or analog input does not exceed
the supply voltage by more than 50mV, the output code will be correct.
Note 7: Channel leakage current is measured after the channel selection.
Note 8: To minimize errors caused by noise at the chip select input, the
internal circuitry waits for two ACLK falling edges after a chip select falling
edge is detected before responding to control input signals. Therefore, no
attempt should be made to clock an address in or data out until the
minimum chip select setup time has elapsed.
CC
HARA TERISTICS
UW
A
TYPICALPERFOR
CE
Supply Current vs Temperature
Reference Current vs Temperature
AMBIENT TEMPERATURE (掳C)
鈥�50
0
SUPPLY
CURRENT,
I
CC
(渭
A)
100
250
0
50
75
LTC1283 G01
50
200
150
鈥�25
25
100
125
REF+ OPEN
ACLK = 500kHz
VCC = CS = 3V
AMBIENT TEMPERATURE (掳C)
鈥�50
0
MAGNITUDE
OF
OFFSET
CHANGE,
OFFSET
(LSB)
0.2
0.5
0
50
75
LTC1283 G06
0.1
0.4
0.3
鈥�25
25
100
125
VCC = 3V
VREF = 2.5V
ACLK = 500kHz
Unadjusted Offset Error
vs Reference Voltage
TEMPERATURE (掳C)
鈥�50
0
I REF
(渭
A)
200
500
0
50
75
LTC1283 G02
100
400
300
鈥�25
25
100
125
VCC = 3V
VREF = 2.5V
The
鈼� denotes the specifications which
apply over the full operating temperature range, otherwise specifications are at TA = 25掳C. (Note 3)
鐩搁棞(gu膩n)PDF璩囨枡
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