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參數(shù)資料
| 型號(hào)： | LTC1199LIS8#TR |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 4/28頁 |
| 文件大小： | 0K |
| 描述： | IC ADC 10BIT 210KHZ W/SD 8-SOIC |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 位數(shù)： | 10 |
| 采樣率（每秒）： | 210k |
| 數(shù)據(jù)接口： | MICROWIRE?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 25mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SOIC |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 1 個(gè)單端，單極 |
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12
LTC1197/LTC1197L
LTC1199/LTC1199L
OVERVIEW
The LTC1197/LTC1197L/LTC1199/LTC1199L are 10-bit
switched-capacitor A/D converters. These sampling ADCs
typically draw 5mA of supply current when sampling up to
500kHz (800
A at 2.7V sampling up to 250kHz). Supply
current drops linearly as the sample rate is reduced (see
Supply Current vs Sample Rate in the Typical Perfor-
mance Characteristics). The ADCs automatically power
down when not performing a conversion, drawing only
leakage current. They are packaged in 8-pin MSOP and SO
packages. The LTC1197L/LTC1199L operate on a single
supply ranging from 2.7V to 4V. The LTC1197 operates on
a single supply ranging from 4V to 9V while the LTC1199
operates from 4V to 6V.
These ADCs contain a 10-bit, switched-capacitor ADC, a
sample-and-hold and a serial port (see Block Diagram).
Although they share the same basic design, the LTC1197/
LTC1197L and LTC1199/LTC1199L differ in some re-
spects. The LTC1197/LTC1197L have a differential input
and have an external reference input pin. They can mea-
sure signals floating on a DC common mode voltage and
can operate with reduced spans down to 200mV. Reduc-
ing the span allows it to achieve 200
V resolution. The
LTC1199/LTC1199L have a 2-channel input multiplexer
with the reference connected to the supply (VCC) pin. They
can convert the input voltage of either channel with re-
spect to ground or the difference between the voltages of
the two channels.
SERIAL INTERFACE
The LTC1199/LTC1199L communicate with microproces-
sors and other external circuitry via a synchronous, half
duplex, 4-wire serial interface while the LTC1197/
LTC1197L use a 3-wire interface (see Operating Sequence
in Figures 1 and 2). These interfaces are compatible with
both SPI and MICROWIRE protocols without requiring any
additional glue logic (see MICROPROCESSOR INTER-
FACES: Motorola SPI).
DATA TRANSFER
The CLK synchronizes the data transfer with each bit being
transmitted and captured on the rising CLK edge in both
transmitting and receiving systems. The LTC1199/
LTC1199L first receives input data and then transmits
back the A/D conversion result (half duplex). Because of
the half-duplex operation, DIN and DOUT may be tied
together allowing transmission over just three wires: CS,
CLK and DATA (DIN/DOUT).
Data transfer is initiated by a falling chip select (CS) signal.
After CS falls the LTC1199/LTC1199L look for a start bit on
the DIN input. After the start bit is received, the 3-bit input
word is shifted into the DIN input which configures the
LTC1199/LTC1199L and starts the conversion. After two
null bits, the result of the conversion is output on the DOUT
line in MSB-first format. At the end of the data exchange
CS should be brought high. This resets the LTC1199/
LTC1199L in preparation for the next data exchange.
Bringing CS high after the conversion also minimizes
supply current if CLK is left running.
Figure 1. LTC1197/LTC1197L Operating Sequence
1197/99 F01
CLK
CS
tdDO
tsuCS
B0*
B1
B2
B3
B4
B5
B6
B7
B8
B9
NULL
BITS
Hi-Z
14
13
12
11
10
9
8
7
6
5
4
3
2
1
DOUT
HI-Z
*AFTER COMPLETING THE DATA TRANSFER, IF FURTHER CLOCKS ARE APPLIED WITH CS LOW,
THE ADC WILL OUTPUT ZEROS INDEFINITELY
tCYC (14 CLKs )*
tSMPL
(1.5 CLKs)
POWER
DOWN
tCONV
(10.5 CLKs)
APPLICATIO S I FOR ATIO
WU
UU
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