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參數(shù)資料
| 型號： | LTC1198-2BCS8#TR |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 3/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 8BIT 750KHZ SHUTDWN 8SOIC |
| 標準包裝： | 2,500 |
| 位數(shù)： | 8 |
| 采樣率（每秒）： | 750k |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 50mW |
| 電壓電源： | 單電源 |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應商設備封裝： | 8-SOIC |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 1 個單端，單極 |
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LTC1196/LTC1198
11
119698fb
TYPICAL PERFORMANCE CHARACTERISTICS
Spurious-Free Dynamic Range
vs Frequency
Output Amplitude
vs Input Frequency
INPUT FREQUENCY (Hz)
1k
PEAK-TO-PEAK
OUTPUT
(%)
10M
1196/98 G34
10k
100k
1M
100
80
60
40
20
0
VREF = VCC = 2.7V
VREF = VCC = 5V
FREQUENCY (Hz)
1k
70
60
50
40
30
20
10
0
1M
1196/98 G35
10k
100k
10M
SPURIOUS-FREE
DYNAMIC
RANGE
(dB)
TA = 25°C
VCC = 3V
fCLK = 5MHz
VCC = 5V
fCLK = 12MHz
PIN FUNCTIONS
LTC1196
CS (Pin 1): Chip Select Input. A logic LOW on this input
enables the LTC1196. A logic HIGH on this input disables
the LTC1196.
IN+ (Pin 2): Analog Input. This input must be free of noise
with respect to GND.
IN– (Pin 3): Analog Input. This input must be free of noise
with respect to GND.
GND (Pin 4): Analog Ground. GND should be tied directly
to an analog ground plane.
VREF (Pin 5): Reference Input. The reference input denes
the span of the A/D converter and must be kept free of
noise with respect to GND.
DOUT (Pin 6): Digital Data Output. The A/D conversion
result is shifted out of this output.
CLK (Pin 7): Shift Clock. This clock synchronizes the se-
rial data transfer.
VCC(Pin8):PowerSupplyVoltage.Thispinprovidespower
to the A/D converter. It must be kept free of noise and ripple
by bypassing directly to the analog ground plane.
LTC1198
CS/SHUTDOWN (Pin 1): Chip Select Input. A logic LOW
on this input enables the LTC1198. A logic HIGH on this
input disables the LTC1198 and disconnects the power
to THE LTC1198.
CHO (Pin 2): Analog Input. This input must be free of
noise with respect to GND.
CH1 (Pin 3): Analog Input. This input must be free of noise
with respect to GND.
GND (Pin 4): Analog Ground. GND should be tied directly
to an analog ground plane.
DIN (Pin 5): Digital Data Input. The multiplexer address is
shifted into this input.
DOUT (Pin 6): Digital Data Output. The A/D conversion
result is shifted out of this output.
CLK (Pin 7): Shift Clock. This clock synchronizes the se-
rial data transfer.
VCC (VREF) (Pin 8): Power Supply and Reference Volt-
age. This pin provides power and denes the span of the
A/D converter. It must be kept free of noise and ripple by
bypassing directly to the analog ground plane.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LTC1198-2BCS8-TRPBF | 制造商:LINER 制造商全稱:Linear Technology 功能描述:8-Bit, SO-8, 1Msps ADCs with Auto-Shutdown Options |
| LTC1198CN8 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Converter IC |
| LTC1198CS8 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Converter IC |
| LTC1199 | 制造商:LINER 制造商全稱:Linear Technology 功能描述:10-Bit, 500ksps ADCs in MSOP with Auto Shutdown |
| LTC1199C | 制造商:LINER 制造商全稱:Linear Technology 功能描述:10-Bit, 500ksps ADCs in MSOP with Auto Shutdown |
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