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參數(shù)資料
| 型號： | LTC1164-5CSW#TR |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 2/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC FILTER LP 8TH ORDER 16SOIC |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 濾波器類型： | 巴特沃斯或貝塞爾低通 |
| 頻率 - 截止或中心： | 20kHz |
| 濾波器數(shù)： | 1 |
| 濾波器階數(shù)： | 8th |
| 電源電壓： | 4.75 V ~ 16 V，±2.375 V ~ 8 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SOIC |
| 包裝： | 帶卷 (TR) |
LTC1164-5
10
11645fc
Aliasing
Aliasing is an inherent phenomenon of sampled data
systems and it occurs when input frequencies close to the
sampling frequency are applied. For the LTC1164-5 case
at 100:1, an input signal whose frequency is in the range
of fCLK ±2.5% will be aliased back into the filter’s pass-
band. If, for instance, an LTC1164-5 operating with a
100kHz clock and 1kHz cutoff frequency receives a 98kHz
10mV input signal, a 2kHz 56
V alias signal will appear at
its output. When the LTC1164-5 operates with a clock-to-
cutoff frequency of 50:1, aliasing occurs at twice the clock
frequency. Table 4 shows details.
Table 4. Aliasing Data (fCLK = 100kHz, VS = ±5V)
INPUT FREQUENCY
OUTPUT LEVEL
OUTPUT FREQUENCY
(VIN = 1VRMS)
(Relative to Input)
(Aliased Frequency)
(fCLK/fC) = 100:1, fCUTOFF = 1kHz
97.0kHz
–102.0dB
3.0kHz
97.5kHz
– 65.0dB
2.5kHz
98.0kHz
– 45.0dB
2.0kHz
98.5kHz
– 23.0dB
1.5kHz
99.0kHz
– 4.0dB
1.0kHz
99.5kHz
– 0.3dB
0.5kHz
(fCLK/fC) = 50:1, fCUTOFF = 2kHz
197.0kHz
– 23.0dB
3.0kHz
197.5kHz
–12.0dB
2.5kHz
198.0kHz
– 5.0dB
2.0kHz
198.5kHz
–1.8dB
1.5kHz
199.0kHz
–1.0dB
1.0kHz
199.5kHz
– 0.8dB
0.5kHz
Table 5. Transient Response of LTC Lowpass Filters
DELAY
RISE
SETTLING
OVER-
TIME*
TIME**
TIME***
SHOOT
LOWPASS FILTER
(SEC)
(%)
LTC1064-3 Bessel
0.50/fC
0.34/fC
0.80/fC
0.5
LTC1164-5 Bessel
0.43/fC
0.34/fC
0.85/fC
0
LTC1164-6 Bessel
0.43/fC
0.34/fC
1.15/fC
1
LTC1264-7 Linear Phase
1.15/fC
0.36/fC
2.05/fC
5
LTC1164-7 Linear Phase
1.20/fC
0.39/fC
2.20/fC
5
LTC1064-7 Linear Phase
1.20/fC
0.39/fC
2.20/fC
5
LTC1164-5 Butterworth
0.80/fC
0.48/fC
2.40/fC
11
LTC1164-6 Elliptic
0.85/fC
0.54/fC
4.30/fC
18
LTC1064-4 Elliptic
0.90/fC
0.54/fC
4.50/fC
20
LTC1064-1 Elliptic
0.85/fC
0.54/fC
6.50/fC
20
* To 50%
±5%, ** 10% to 90% ±5%, *** To 1% ±0.5%
APPLICATIO S I FOR ATIO
WU
U
Any parasitic switching transients during the rise and fall
edges of the incoming clock are not part of the clock
feedthrough specifications. Switching transients have fre-
quency contents much higher than the applied clock; their
amplitude strongly depends on scope probing techniques
as well as grounding and power supply bypassing. The
clock feedthrough, if bothersome, can be greatly reduced
by adding a simple R/C lowpass network at the output of
the filter pin (Pin 9). This R/C will completely eliminate any
switching transient.
Wideband Noise
The wideband noise of the filter is the total RMS value of
the device’s noise spectral density and it is used to
determine the operating signal-to-noise ratio. Most of its
frequency contents lie within the filter passband and it
cannot be reduced with post filtering. For instance, the
LTC1164-5 wideband noise at
±2.5V supply is 100VRMS,
95
VRMS of which have frequency contents from DC up to
the filter’s cutoff frequency. The total wideband noise
(
RMS)isnearlyindependentofthevalueoftheclock.The
clock feedthrough specifications are not part of the wide-
band noise.
Speed Limitations
The LTC1164-5 optimizes AC performance versus power
consumption. To avoid op amp slew rate limiting at
maximum clock frequencies, the signal amplitude should
be kept below a specified level as shown in Table 3.
Table 3. Maximum VIN vs VS and fCLK
POWER SUPPLY
MAXIMUM fCLK
MAXIMUM VIN
VS = ±7.5V
1.5MHz
1VRMS (fIN > 35kHz)
0.5VRMS (fIN > 250kHz)
VS = ±7.5V
1.0MHz
3VRMS (fIN > 25kHz)
0.7VRMS (fIN > 250kHz)
VS = ±5.0V
1.0MHz
2.5VRMS (fIN > 25kHz)
0.5VRMS (fIN > 100kHz)
Single 5V
1.0MHz
0.7VRMS (fIN > 25kHz)
0.5VRMS (fIN > 100kHz)
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