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參數(shù)資料
| 型號： | LTC1159-5 |
| 廠商： | Linear Technology Corporation |
| 元件分類： | 基準(zhǔn)電壓源/電流源 |
| 英文描述： | 500kHz and 1MHz High Efficiency 1.5A Switching Regulators; Package: SO; No of Pins: 8; Temperature Range: -40?°C to 85?°C |
| 中文描述： | 射頻放大器 |
| 文件頁數(shù)： | 5/20頁 |
| 文件大小： | 323K |
| 代理商： | LTC1159-5 |
5
LTC1159/LTC1159-3.3/LTC1159-5
PI FU
V
IN
:
Main Supply Input Pin.
S-GND:
Small Signal Ground. Must be routed separately
from other grounds to the (–) terminal of C
OUT
.
P-GND:
Driver Power Grounds. Connect to source of N-
channel MOSFET and the (–) terminal of C
IN
.
V
CC
:
Outputs of internal 4.5V linear regulator, EXTV
CC
switch, and supply inputs for driver and control circuits.
The driver and control circuits are powered from the higher
of the 4.5V regulator or EXTV
CC
voltage. Must be closely
decoupled to power ground.
C
T
:
External capacitor C
T
from this pin to ground sets the
operating frequency. (The frequency is also dependent on
the ratio V
OUT
/V
IN
.)
I
TH
:
Gain Amplifier Decoupling Point. The current com-
parator threshold increases with the I
TH
pin voltage.
V
FB
:
For the LTC1159 adjustable version, the V
FB
pin
receives the feedback voltage from an external resistive
divider used to set the output voltage.
Sense
–
:
Connects to internal resistive divider which sets
the output voltage in fixed output versions. The Sense
–
pin
is also the (–) input of the current comparator.
U
Sense
+
:
The (+) Input for the Current Comparator. A built-
in offset between the Sense
+
and Sense
–
pins, in conjunc-
tion with R
SENSE
, sets the current trip threshold.
N-Gate:
High Current Drive for the Bottom N-Channel
MOSFET. The N-Gate pin swings from ground to V
CC
.
P-Gate:
Level-Shifted Gate Drive Signal for the Top
P-Channel MOSFET. The voltage swing at the P-gate pin is
from V
IN
to V
IN
– V
CC
.
P-Drive:
High Current Gate Drive for the Top P-Channel
MOSFET. The P-drive pin(s) swing(s) from V
CC
to ground.
CAP:
Charge Compensation Pin. A capacitor to V
CC
pro-
vides charge required by the P-gate level-shift capacitor
during supply transitions. The charge compensation ca-
pacitor must be larger than the gate drive capacitor
SHDN1:
This pin shuts down the control circuitry only (V
CC
is not affected). Taking SHDN1 pin high turns off the
control circuitry and holds both MOSFETs off. This pin
must be at ground potential for normal operation.
SHDN2:
Master Shutdown Pin. Taking SHDN2 high shuts
down V
CC
and all control circuitry.
The LTC1159 uses a current mode, constant off-time
architecture to synchronously switch an external pair of
complementary power MOSFETs. Operating frequency is
set by an external capacitor at the C
T
pin.
The output voltage is sensed either by an internal voltage
divider connected to the Sense
–
pin (LTC1159-3.3 and
LTC1159-5) or an external divider returned to the V
FB
pin
(LTC1159). A voltage comparator V, and a gain block G,
compare the divided output voltage with a reference
voltage of 1.25V. To optimize efficiency, the LTC1159
automatically switches between two modes of operation,
burst and continuous.
A low dropout 4.5V regulator provides the operating volt-
age V
CC
for the MOSFET drivers and control circuitry
during start-up. During normal operation, the LTC1159
family powers the drivers and control from the output via
the EXTV
CC
pin to improve efficiency. The N-gate pin is
referenced to ground and drives the N-channel MOSFET
(Refer to Functional Diagram)
gate directly. The P-channel gate drive must be referenced
to the main supply input V
IN
, which is accomplished by
level-shifting the P-drive signal via an internal 550k resis-
tor and external capacitor.
During the switch “ON” cycle in continuous mode,
current comparator C monitors the voltage between the
Sense
+
and Sense
–
pins connected across an external
shunt in series with the inductor. When the voltage
across the shunt reaches its threshold value, the P-gate
output is switched to V
IN
, turning off the P-channel
MOSFET. The timing capacitor C
T
is now allowed to
discharge at a rate determined by the off-time controller.
The discharge current is made proportional to the
output voltage to model the inductor current, which
decays at a rate which is also proportional to the output
voltage. While the timing capacitor is discharging, the
N-gate output is high, turning on the N-channel
MOSFET.
OPERATIOU
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