參數(shù)資料
型號: LTC1098L
廠商: Linear Technology Corporation
元件分類: 串行ADC
英文描述: Micropower Sampling 8-Bit I/O A/D Converters(3V,微功耗,采樣8位串行I/O模數(shù)轉(zhuǎn)換器)
中文描述: 微采樣8位I /辦公自動化/ D轉(zhuǎn)換器(3V供電,微功耗,采樣8位串行的I / O模數(shù)轉(zhuǎn)換器)
文件頁數(shù): 10/28頁
文件大小: 368K
代理商: LTC1098L
10
LTC1096/LTC1096L
LTC1098/LTC1098L
W
IAGRA
BLOCK
PI FUU
LTC1096/LTC1096L
CS/SHDN (Pin 1):
Chip Select Input. A logic low on this
input enables the LTC1096/LTC1096L. A logic high on this
input disables the LTC1096/LTC1096L and disconnects
the power to the LTC1096/LTC1096L.
IN
+
(Pin 2):
Analog Input. This input must be free of noise
with respect to GND.
IN
(Pin 3):
Analog Input. This input must be free of noise
with respect to GND.
GND (Pin 4):
Analog Ground. GND should be tied directly
to an analog ground plane.
V
REF
(Pin 5):
Reference Input. The reference input defines
the span of the A/D converter and must be kept free of
noise with respect to GND.
D
OUT
(Pin 6):
Digital Data Output. The A/D conversion
result is shifted out of this output.
CLK (Pin 7):
Shift Clock. This clock synchronizes the serial
data transfer.
V
CC
(Pin 8):
Power Supply Voltage. This pin provides
power to the A/D converter. It must be free of noise and
ripple by bypassing directly to the analog ground plane.
U
LTC1098/LTC1098L
CS/SHDN (Pin 1):
Chip Select Input. A logic low on this
input enables the LTC1098/LTC1098L. A logic high on this
input disables the LTC1098/LTC1098L and disconnects
the power to the LTC1098/LTC1098L.
CH0 (Pin 2):
Analog Input. This input must be free of noise
with respect to GND.
CH1 (Pin 3):
Analog Input. This input must be free of noise
with respect to GND.
GND (Pin 4):
Analog Ground. GND should be tied directly
to an analog ground plane.
D
IN
(Pin 5):
Digital Data Input. The multiplexer address is
shifted into this pin.
D
OUT
(Pin 6):
Digital Data Output. The A/D conversion
result is shifted out of this output.
CLK (Pin 7):
Shift Clock. This clock synchronizes the serial
data transfer.
V
CC
(V
REF
)(Pin 8):
Power Supply Voltage. This pin pro-
vides power and defines the span of the A/D converter. It
must be free of noise and ripple by bypassing directly to
the analog ground plane.
+
C
SAMPLE
BIAS AND
SHUTDOWN CIRCUIT
SERIAL PORT
V
CC
(V
CC
/V
REF
)
CS
CLK
D
OUT
IN
+
(CH0)
IN
(CH1)
MICROPOWER
COMPARATOR
CAPACITIVE DAC
SAR
V
REF
GND
PIN NAMES IN PARENTHESES
REFER TO THE LTC1098/LTC1098L
(D
IN
)
LTC1096/LTC1096L
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