參數(shù)資料
型號(hào): LTC1090ACN#PBF
廠商: Linear Technology
文件頁數(shù): 22/28頁
文件大?。?/td> 0K
描述: IC DATA ACQUIS SYS 10BIT 20-DIP
標(biāo)準(zhǔn)包裝: 18
類型: 數(shù)據(jù)采集系統(tǒng)(DAS),ADC
分辨率(位): 10 b
采樣率(每秒): 30k
數(shù)據(jù)接口: 串行
電壓電源: 單/雙電源
電源電壓: ±5V,5V,10V
工作溫度: -40°C ~ 85°C
安裝類型: 通孔
封裝/外殼: 20-DIP(0.300",7.62mm)
供應(yīng)商設(shè)備封裝: 20-PDIP
包裝: 管件
產(chǎn)品目錄頁面: 1345 (CN2011-ZH PDF)
3
LTC1090
1090fc
CO VERTER A D
ULTIPLEXER CHARACTERISTICS
U
W
U
LTC1090A
LTC1090
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
Offset Error
(Note 4)
±0.5
LSB
Linearity Error
(Notes 4 and 5)
±0.5
LSB
Gain Error
(Note 4)
±1.0
±2.0
LSB
Total Unadjusted Error
VREF = 5.000V
±1.0
LSB
(Notes 4 and 6)
Reference Input Resistance
10
k
Analog and REF Input Range
(Note 7)
(V) – 0.05V to VCC 0.05V
V
On Channel Leakage Current
On Channel = 5V
11
A
(Note 8)
Off Channel = 0V
On Channel = 0V
–1
A
Off Channel = 5V
Off Channel Leakage Current
On Channel = 5V
–1
A
(Note 8)
Off Channel = 0V
On Channel = 0V
11
A
Off Channel = 5V
The denotes specifications which
apply over the full operating temperature range, otherwise specifications are TA = 25°C. (Note 3)
LTC1090/LTC1090A
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
tACC
Delay Time From CS↓ to DOUT Data Valid
(Note 9)
2
ACLK Cycles
tSMPL
Analog Input Sample Time
See Operating Sequence
5
SCLK Cycles
tCONV
Conversion Time
See Operating Sequence
44
ACLK Cycles
tdDO
Delay Time, SCLK
↓ to DOUT Data Valid
See Test Circuits
250
450
ns
tdis
Delay Time, CS
↑ to DOUT Hi-Z
See Test Circuits
140
300
ns
ten
Delay Time, 2nd CLK
↓ to DOUT Enabled
See Test Circuits
150
400
ns
thDO
Time Output Data Remains Valid After SCLK
50
ns
tf
DOUT Fall Time
See Test Circuits
90
300
ns
tr
DOUT Rise Time
See Test Circuits
60
300
ns
CIN
Input Capacitance
Analog Inputs
On Channel
65
pF
Off Channel
5
pF
Digital Inputs
5
pF
The denotes specifications which apply over the full operating
temperature range, otherwise specification are TA = 25°C. (Note 3)
AC ELECTRICAL CHARACTERISTICS
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