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參數資料
| 型號： | LT6402IUD-6#TRPBF |
| 廠商： | Linear Technology |
| 文件頁數： | 5/16頁 |
| 文件大小： | 0K |
| 描述： | IC DIFF AMP/ADC DVR 6DB 16-QFN |
| 標準包裝： | 2,500 |
| 放大器類型： | 差分 |
| 電路數： | 2 |
| 輸出類型： | 差分 |
| 轉換速率： | 400 V/µs |
| -3db帶寬： | 300MHz |
| 電流 - 輸入偏壓： | 5µA |
| 電壓 - 輸入偏移： | 1000µV |
| 電流 - 電源： | 30mA |
| 電流 - 輸出 / 通道： | 35mA |
| 電壓 - 電源，單路/雙路(±)： | 4 V ~ 5.5 V，±2 V ~ 2.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-WFQFN 裸露焊盤 |
| 供應商設備封裝： | 16-QFN-EP（3x3） |
| 包裝： | 帶卷 (TR) |
13
64026fa
LT6402-6
can also be used, but since it is being driven differentially
it will appear at each ltered output as a single-ended
capacitance of twice the value. To halve the lter band-
width, for example, two 42pF capacitors could be added
(one from each ltered output to ground). Alternatively
one 21pF capacitor could be added between the ltered
outputs, again halving the lter bandwidth. Combinations
of capacitors could be used as well; a three capacitor
solution of 14pF from each ltered output to ground plus
a 14pF capacitor between the ltered outputs would also
halve the lter bandwidth (Figure 7).
Bandpass ltering is also easily implemented with just a
few external components. An additional 560pF and 62nH,
each added differentially between +OUTFILTERED and
–OUTFILTERED creates a bandpass lter with a 26MHz
center frequency, –3dB points of 23MHz and 30MHz, and
1.6dB of insertion loss (Figure 8).
Output Common Mode Adjustment
The LT6402-6’s output common mode voltage is set by the
VOCM pin. It is a high-impedance input, capable of setting
the output common mode voltage anywhere in a range
from 1.1V to 3.6V. Bandwidth of the VOCM pin is typically
200MHz, so for applications where the VOCM pin is tied to
a DC bias voltage, a 0.1μF capacitor at this pin is recom-
mended. For best distortion performance, the voltage at
the VOCM pin should be between 1.2V and 2.6V.
When interfacing with most ADCs, there is generally a
VOCM output pin that is at about half of the supply voltage
of the ADC. For 5V ADCs such as the LTC17XX family, this
VOCM output pin should be connected directly (with the
addition of a 0.1μF capacitor) to the input VOCM pin of the
LT6402-6. For 3V ADCs such as the LTC22XX families,
the LT6402-6 will function properly using the 1.65V from
the ADC’s VCM reference pin, but improved Spurious Free
Dynamic Range (SFDR) and distortion performance can
be achieved by level-shifting the LTC22XX’s VCM reference
voltage up to at least 1.8V. This can be accomplished as
shown in Figure 9 by using a resistor divider between the
LTC22XX’s VCMoutput pin and VCC and then bypassing the
LT6402-6’s VOCM pin with a 0.1μF capacitor. For a com-
mon mode voltage above 1.9V, AC coupling capacitors
are recommended between the LT6402-6 and LTC22XX
ADCs because of the input voltage range constraints of
the ADC.
Figure 7. LT6402-6 Internal Filter Topology Modied
for 1/2x Filter Bandwidth (3 External Capacitors)
Figure 8. LT6402-6 Output Filter Modied for Bandpass
Filtering (1 External Inductor, 1 External Capacitor)
Figure 9. Level Shifting 3V ADC VCM Voltage for
Improved SFDR
APPLICATIONS INFORMATION
VEE
64026 F07
50Ω
14pF
LT6402-6
–OUT
+OUT
50Ω
14pF
–OUTFILTERED
+OUTFILTERED
8
7
6
5
FILTERED OUTPUT
(37.5MHz)
VEE
64026 F08
50Ω
14pF
LT6402-6
–OUT
+OUT
50Ω
14pF
–OUTFILTERED
+OUTFILTERED
8
7
6
5
FILTERED OUTPUT
64026 F09
IF IN
LT6402-6
–INA
–INB
VOCM
2
31
6
7
1
2
+INB
+INA
14
13
15
80.6Ω
16
10Ω
LTC22xx
0.1μF
+OUTFILTERED
–OUTFILTERED
AIN+
AIN–
4.02k
11k
1.9V
1.5V
3V
VCM
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