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參數(shù)資料
| 型號(hào)： | LT6402CUD-20#PBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 3/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DIFF AMP/ADC DRVR 16-QFN |
| 標(biāo)準(zhǔn)包裝： | 121 |
| 放大器類型： | 差分 |
| 電路數(shù)： | 2 |
| 輸出類型： | 差分 |
| 轉(zhuǎn)換速率： | 400 V/µs |
| -3db帶寬： | 300MHz |
| 電流 - 輸入偏壓： | 5µA |
| 電壓 - 輸入偏移： | 1000µV |
| 電流 - 電源： | 30mA |
| 電流 - 輸出 / 通道： | 35mA |
| 電壓 - 電源，單路/雙路(±)： | 4 V ~ 5.5 V，±2 V ~ 2.5 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 16-QFN-EP（3x3） |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 1322 (CN2011-ZH PDF) |
11
640220fa
LT6402-20
APPLICATIO S I FOR ATIO
WU
U
Single-Ended to Differential Operation
The LT6402-20’s performance with single-ended inputs
is comparable to its performance with differential inputs.
This excellent single-ended performance is largely due
to the internal topology of the LT6402-20. Referring to
the block diagram, if the +INA and +INB pins are driven
with a single-ended signal (while –INA and –INB are tied
to AC ground), then the +OUT and –OUT pins are driven
differentially without any voltage swing needed from
amplier C. Single-ended to differential conversion using
more conventional topologies suffers from performance
limitations due to the common mode amplier.
Driving ADCs
The LT6402-20 has been specically designed to interface
directly with high speed Analog to Digital Converters
(ADCs). In general, these ADCs have differential inputs, with
an input impedance of 1kΩ or higher. In addition, there is
generally some form of lowpass or bandpass ltering just
prior to the ADC to limit input noise at the ADC, thereby
improving system signal to noise ratio. Both the unltered
and ltered outputs of the LT6402-20 can easily drive the
high impedance inputs of these differential ADCs. If the
ltered outputs are used, then cutoff frequency and the
type of lter can be tailored for the specic application if
needed.
Wideband Applications
(Using the +OUT and –OUT Pins)
In applications where the full bandwidth of the LT6402-20
is desired, the unltered output pins (+OUT and –OUT)
should be used. They have a low output impedance;
therefore, gain is unaffected by output load. Capacitance
in excess of 5pF placed directly on the unltered outputs
results in additional peaking and reduced performance.
When driving an ADC directly, a small series resistance
is recommended between the LT6402-20’s outputs and
the ADC inputs (Figure 4). This resistance helps eliminate
any resonances associated with bond wire inductances of
either the ADC inputs or the LT6402-20’s outputs. A value
between 10Ω and 25Ω gives excellent results.
Figure 3. Alternate Input Termination for Differential 50Ω
Input Impedance
6402 F03
IF IN–
IF IN+
LT6402-20
–INA
–INB
–OUT
+OUT
8
5
+INB
+INA
14
13
15
ZIN = 50
DIFFERENTIAL
16
100
6402 F04
LT6402-20
–OUT
+OUT
8
5
10
TO 25
10
TO 25
ADC
Figure 4. Adding Small Series R at LT6402 Output
Figure 2. Input Termination for Differential 50Ω Input Impedance
6402 F02
IF IN–
IF IN+
LT6402-20
–INA
–INB
–OUT
+OUT
8
5
+INB
+INA
14
13
15
49.9
ZIN = 50
DIFFERENTIAL
16
49.9
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