elecTrical characTerisTics The l denotes spe" />
參數(shù)資料
型號(hào)： LT6350CDD#PBF
廠商： Linear Technology
文件頁(yè)數(shù)： 23/28頁(yè)
文件大?。?/td> 0K
描述： IC DRIVER DIFF CONVERT/ADC 8-DFN
標(biāo)準(zhǔn)包裝： 121
類型： ADC 驅(qū)動(dòng)器
應(yīng)用： 數(shù)據(jù)采集
安裝類型： 表面貼裝
封裝/外殼： 8-WFDFN 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝： 8-DFN-EP（3x3）
包裝： 管件
配用： DC1783A-H-ND - BOARD SAR ADC LTC2376-18
DC1783A-G-ND - BOARD SAR ADC LTC2377-18
DC1783A-F-ND - BOARD SAR ADC LTC2378-18
DC1783A-E-ND - BOARD SAR ADC LTC2379-18
DC1783A-D-ND - BOARD SAR ADC LTC2376-16
DC1783A-C-ND - BOARD SAR ADC LTC2377-16
DC1783A-B-ND - BOARD SAR ADC LTC2378-16
DC1783A-A-ND - BOARD SAR ADC LTC2380-16
DC1500A-C-ND - BOARD SAR ADC LTC2391-16
DC1500A-B-ND - BOARD SAR ADC LTC2392-16
LT6350
4
6350fc
For more information www.linear.com/LT6350
elecTrical characTerisTics The
l
denotes specifications that apply over the full specified temperature range,
otherwise specifications are at TA = 25°C. Unless noted otherwise, V+ = 5V, V– = 0V, V+IN1 = V2 = Mid-Supply, VSHDN = V+, RL = OPEN, RF =
SHORT, RG = OPEN. VS is defined as (V+ – V–). VOUTCM is defined as (VOUT1 + VOUT2)/2. VOUTDIFF is defined as (VOUT1 – VOUT2). See Figure 1.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
CIN
Input Capacitance
Single-Ended Input at +IN1
1.8
pF
CMRR1
Common Mode Rejection Ratio, Op Amp 1 VS = 5V, V+IN1 = V–IN1 = V– +1.5V to V+
VS = 5V, V+IN1 = V–IN1 = V– +1.5V to V+
VS = 5V, V+IN1 = V–IN1 = V– to V+
VS = 3V, V+IN1 = V–IN1 = V– to V+
l
82
77
72
67
94
88
82
dB
CMRR2
Common Mode Rejection Ratio, Op Amp 2 VS = 5V, V+IN1 = V2 = V–+1.5V to V+ –0.1V
VS = 3V, V+IN1 = V2 = V–+1.5V to V+ –0.1V
VS = 10V, V+IN1 = V2 = V–+1.5V to V+ –0.1V
l
93
85
96
118
110
118
dB
PSRR
Power Supply Rejection Ratio
(VS/VOSDIFF)
VS = 2.7V to 12V
l
80
108
dB
VS
Supply Voltage (Note 7)
l
2.7
12
V
BAL
Output Balance (VOUTDIFF/VOUTCM)
(Note 8)
VOUTDIFF = 2V
l
50
68
dB
GAIN
Closed-Loop Gain
(VOUTDIFF/(V+IN1 –V2))
(V+IN1 –V2) = 4V
l
2
V/V
GAINERR
Closed-Loop Gain Error
l
–0.6
±0.08
0.6
%
GAINERR/T Closed-Loop Gain Error Drift
l
3
ppm/°C
INL
DC Linearity (Note 9)
V+ = 5V, V– = 0V
V+ = 5V, V– = –2V
V+ = 5V, V– = –2V, 16-Bit, 8VP-P
230
125
±1
V
LSB
RINT
Internal Resistors
1000
Ω
VOH
Output Swing to V+, Either Output
(Note 10)
No Load
Sourcing 12.5mA
l
55
360
170
750
mV
VOL
Output Swing to V–, Either Output
(Note 10)
No Load
Sourcing 12.5mA
l
55
260
170
460
mV
ISC
Output Short-Circuit Current
V+IN1 = Mid-Rail ±200mV, V–IN1 = Mid-Rail
VS = 5V
VS = 3V
l
±27
±15
±45
±40
mA
VIL
SHDN Input Logic Low
VS = 2.7V to 12V
l
V– + 0.3
V
VIH
SHDN Input Logic High
VS = 2.7V to 12V
l
V– + 2.0
V
ISHDN
SHDN Pin Current
SHDN = V+
SHDN = V–
l
–1
–45
–20
1
A
IS
Supply Current
VS = 3V
VS = 5V
VS = 10V
l
4.5
4.8
5.4
8.1
5.8
8.3
10.4
mA
IS(SHDN)
Supply Current in Shutdown
VS = 3V, VSHDN = VIL
VS = 5V, VSHDN = VIL
VS = 10V, VSHDN = VIL
l
43
60
70
220
240
260
A
GBW
Gain-Bandwidth Product
Frequency = 1MHz
Op Amp 1 (Noninverting)
Op Amp 2 (Inverting)
85
115
MHz
BW
Differential –3dB Small-Signal Bandwidth
VOUTDIFF = 100mVP-P
l
23
19
33
MHz
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