11
LT6301
sn6301 6301f
APPLICATIO S I FOR ATIO
WU
UU
Heat Sinking Using PCB Metal
Designing a thermal management system is often a trial
and error process as it is never certain how effective it is
until it is manufactured and evaluated. As a general rule,
the more copper area of a PCB used for spreading heat
away from the driver package, the more the operating
junction temperature of the driver will be reduced. The
limit to this approach however is the need for very com-
pact circuit layout to allow more ports to be implemented
on any given size PCB.
To best extract heat from the FE28 package, a generous
area of top layer PCB metal should be connected to the four
corner pins (Pins 1, 14, 15 and 28). These pins are fused
to the leadframe where the LT6301 die are attached. The
package also has an exposed metal heat sinking pad on the
bottom side which, when soldered to the PCB top layer
metal, directly conducts heat away from the IC junction.
Soldering the thermal pad to the board produces a thermal
resistance from junction to case,
θJC, of approximately
3
°C/W.
Important Note: The metal planes used for heat sinking
the LT6301 are electrically connected to the negative
supply potential of the driver, typically –12V. These
planes must be isolated from any other power planes
used in the board design.
Fortunately xDSL circuit boards use multiple layers of
metal for interconnection of components. Areas of metal
beneath the LT6301 connected together through several
small 13 mil vias can be effective in conducting heat away
from the driver package. The use of inner layer metal can
free up top and bottom layer PCB area for external compo-
nent placement.
When PCB cards containing multiple ports are inserted
into a rack in an enclosed cabinet, it is often necessary to
provide airflow through the cabinet and over the cards.
This is also very effective in reducing the junction-to-
ambient thermal resistance of each line driver. To a limit,
this thermal resistance can be reduced approximately
5
°C/W for every 100lfpm of laminar airflow.
Layout and Passive Components
With a gain bandwidth product of 200MHz the LT6301
requires attention to detail in order to extract maximum
performance. Use a ground plane, short lead lengths and
a combination of RF-quality supply bypass capacitors (i.e.,
0.1
F). As the primary applications have high drive cur-
rent, use low ESR supply bypass capacitors (1
F to 10F).
The four V+ pins (Pins 18, 19, 24, 25) separately provide
power to each amplifier and should be shorted together
with leads as short as possible to the bypass capacitors.
The parallel combination of the feedback resistor and gain
setting resistor on the inverting input can combine with
the input capacitance to form a pole that can cause
frequency peaking. In general, use feedback resistors of
1k or less.
Compensation
The LT6301 is stable in a gain 10 or higher for any supply
and resistive load. It is easily compensated for lower gains
with a single resistor or a resistor plus a capacitor.
Figure 8 shows that for inverting gains, a resistor from the
inverting node to AC ground guarantees stability if the
parallel combination of RC and RG is less than or equal to
RF/9. For lowest distortion and DC output offset, a series
capacitor, CC, can be used to reduce the noise gain at
lower frequencies. The break frequency produced by RC
and CC should be less than 5MHz to minimize peaking.
Figure 9 shows compensation in the noninverting configu-
ration. The RC, CC network acts similarly to the inverting
case. The input impedance is not reduced because the
network is bootstrapped. This network can also be placed
between the inverting input and an AC ground.
Figure 8. Compensation for Inverting Gains
RG
RC
VO
VI
CC
(OPTIONAL)
–
+
6301 F08
RF
=
–RF
RG
VO
VI
< 5MHz
1
2
πRCCC
(RC || RG) ≤ RF/9