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參數(shù)資料
| 型號： | LT3689IMSE-5#TRPBF |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | 1.95 A SWITCHING REGULATOR, 2160 kHz SWITCHING FREQ-MAX, PDSO16 |
| 封裝： | LEAD FREE, PLASTIC, MSOP-16 |
| 文件頁數(shù)： | 32/32頁 |
| 文件大小： | 2188K |
| 代理商： | LT3689IMSE-5#TRPBF |
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LT3689/LT3689-5
9
3689fd
PIN FUNCTIONS
BST: The BST pin is used to provide drive voltage higher
than the input voltage to the internal NPN power switch.
VIN: The VIN pin supplies current to the LT3689’s internal
circuitry and to the internal power switch and must be
locally bypassed.
SW: The SW pin is the output of the internal power switch.
Connect this pin to the inductor, catch diode and boost
capacitor.
DA: Tie the DA pin to the anode of the external catch
Schottky diode. If the DA pin current exceeds 1.2A,
which could occur in an overload or short-circuit condi-
tion, switching is disabled until the DA pin current falls
below 1.2A.
EN/UVLO: The EN/UVLO pin is used to put the LT3689 in
shutdown mode. Pull the pin below 0.3V to shut down the
LT3689. The 1.26V threshold can function as an accurate
undervoltage lockout (UVLO), preventing the regulator
from operating until the input voltage has reached the
programmed level.
FB: The LT3689 regulates the feedback pin to 0.800V. Con-
nect the feedback resistor divider tap to this pin. For the
fixed LT3689-5 output, this pin can be used to connect a
phase lead capacitor between the OUT pin and FB pin to
optimize transient response.
WDE: Watchdog Timer Enable Pin. This pin disables the
watchdog timer if the WDE voltage exceeds 1V. WDO is
high in this condition.
W/T: Setting W/T low puts the LT3689 watchdog timer into
window mode. If two or more negative edges occur on
WDI before the watchdog lower boundary (tWDL) period
expires, or no negative edge occurs within the watchdog
upperboundary(tWDU)period,thepartwillsetWDOlow.If
W/T is set high, the part will only set WDO low if no transi-
tion occurs within the watchdog upper boundary period.
WDI: Watchdog Timer Input Pin. This pin receives the
watchdog signal from a microprocessor. If the appropriate
signal is not received, the part will pulse WDO low for a
period equal to the reset timeout period. The watchdog
timer is disabled until the WDO pin goes high again.
RST: Active low, open collector logic output with a weak
pull-up to VOUT. After VOUT rises above 90% of its pro-
grammed value, the reset remains asserted for the period
set by the capacitor on the CPOR pin.
WDO: Active low, open collector logic output with weak
pull-up to VOUT. WDO pulls low if the WDE is enabled
and the microprocessor fails to drive the WDI pin of the
LT3689 with an appropriate signal.
CWDT: Watchdog Timer Programming Pin. Place a capa-
citor (CWDT) between this pin and ground to adjust the
watchdog upper and lower boundary period. To determine
thewatchdogupperboundaryperiod,andthelowerbound-
ary period, use the following equations:
tWDU = 18.2 CWDT (watchdog upper boundary period)
tWDL = 0.588 CWDT (watchdog lower boundary period)
tWDU and tWDL are in ms and CWDT is in nF. As an example,
a 47nF capacitor will generate an 855ms watchdog upper
boundary period and a 27.6ms watchdog lower boundary
period.
CPOR: Reset Delay Timer Programming Pin. Attach an
external capacitor (CPOR) to GND to set a reset delay time
of 2.3ms/nF.
RT: Sets the Internal Oscillator Frequency. Tie a 31.6k
resistorfromRTtoGND fora500kHzswitchingfrequency.
SYNC: Drive the SYNC pin with a logic level signal with
positive and negative pulse widths of at least 80ns. The
RT resistor should be chosen to set the LT3689 switching
frequency at least 20% below the lowest synchronization
input frequency.
OUT: The OUT pin supplies current to the internal circuitry
when OUT is above 3V, reducing input quiescent current.
The internal Schottky diode is connected from OUT to BST,
providing the charging path for the boost capacitor. For
the LT3689-5, this pin connects to the internal feedback
divider that programs the fixed 5V output.
GND: Ground. Tie the exposed pad directly to the ground
plane.Theexposedpadmetalofthepackageprovidesboth
electrical contact to ground and good thermal contact to
the printed circuit board. The device must be soldered to
the circuit board for proper operation.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LT3689IMSE-PBF | 制造商:LINER 制造商全稱:Linear Technology 功能描述:700mA Step-Down Regulator with Power-On Reset and Watchdog Timer |
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| LT3689IUD#PBF | 功能描述:IC REG BUCK ADJ 0.7A 16QFN RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - DC DC 開關(guān)穩(wěn)壓器 系列:- 設(shè)計(jì)資源:Design Support Tool 標(biāo)準(zhǔn)包裝:1 系列:- 類型:升壓（升壓） 輸出類型:固定 輸出數(shù):1 輸出電壓:3V 輸入電壓:0.75 V ~ 2 V PWM 型:- 頻率 - 開關(guān):- 電流 - 輸出:100mA 同步整流器:是 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:SOT-23-5 細(xì)型，TSOT-23-5 包裝:剪切帶 (CT) 供應(yīng)商設(shè)備封裝:TSOT-23-5 其它名稱:AS1323-BTTT-30CT |
| LT3689IUD#TRPBF | 功能描述:IC REG BUCK ADJ 0.7A 16QFN RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - DC DC 開關(guān)穩(wěn)壓器 系列:- 設(shè)計(jì)資源:Design Support Tool 標(biāo)準(zhǔn)包裝:1 系列:- 類型:升壓（升壓） 輸出類型:固定 輸出數(shù):1 輸出電壓:3V 輸入電壓:0.75 V ~ 2 V PWM 型:- 頻率 - 開關(guān):- 電流 - 輸出:100mA 同步整流器:是 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:SOT-23-5 細(xì)型，TSOT-23-5 包裝:剪切帶 (CT) 供應(yīng)商設(shè)備封裝:TSOT-23-5 其它名稱:AS1323-BTTT-30CT |
| LT3689IUD-5#PBF | 功能描述:IC REG BUCK 5V 0.7A 16QFN RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - DC DC 開關(guān)穩(wěn)壓器 系列:- 設(shè)計(jì)資源:Design Support Tool 標(biāo)準(zhǔn)包裝:1 系列:- 類型:升壓（升壓） 輸出類型:固定 輸出數(shù):1 輸出電壓:3V 輸入電壓:0.75 V ~ 2 V PWM 型:- 頻率 - 開關(guān):- 電流 - 輸出:100mA 同步整流器:是 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:SOT-23-5 細(xì)型，TSOT-23-5 包裝:剪切帶 (CT) 供應(yīng)商設(shè)備封裝:TSOT-23-5 其它名稱:AS1323-BTTT-30CT |
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