參數(shù)資料
型號: LT3688IFE#TRPBF
廠商: LINEAR TECHNOLOGY CORP
元件分類: 穩(wěn)壓器
英文描述: SWITCHING REGULATOR, PDSO24
封裝: LEAD FREE, PLASTIC, TSSOP-24
文件頁數(shù): 23/28頁
文件大?。?/td> 415K
代理商: LT3688IFE#TRPBF
LT3688
4
3688f
The
l denotes the specications which apply over the full operating
junction temperature range, otherwise specications are at TA = 25°C. VIN = 12V, unless otherwise noted. (Note 3)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
RST Pull-Up Current (Note 6)
–1.5
–2.5
μA
WDO Pull-Up Current (Note 6)
–1.5
–2.5
μA
CONFIG Low Level Input Voltage
l
0.2
V
CONFIG High Level Input Voltage
l
1.4
V
CONFIG Pin Voltage When Open
0.64
V
Maximum CONFIG Input Current in Open
State
l
±1
μA
CONFIG Pin Bias Current
VCONFIG = 0V, VIN
l
±20
μA
ELECTRICAL CHARACTERISTICS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Absolute Maximum Voltage at the VIN, CONFIG and EN/UVLO pins
is 36V for continuous operation.
Note 3: The LT3688 is tested under pulsed load conditions such that
TJ = TA. The LT3688E is guaranteed to meet performance specications
from 0°C to 125°C junction temperature. Specications over the –40°C
to 125°C operating junction temperature range are assured by design,
characterization and correlation with statistical process controls. The
LT3688I is guaranteed over the full –40°C to 125°C operating junction
temperature range. The LT3688H is guaranteed over the full –40°C to
150°C operating junction temperature range. High junction temperatures
degrade operating lifetimes. Operating lifetime is derated at junction
temperatures greater than 125°C. The junction temperature (TJ, in °C) is
calculated from the ambient temperature (TA, in °C) and power dissipation
(PD, in Watts) according to the formula:
TJ = TA + (PD θJA), where θJA (in °C/W) is the package thermal
impedance.
Note 4: The LT3688 contains circuitry that extends the maximum duty
cycle if the BST voltage is 2V greater than the SW voltage. See the
Applications Information section for more details.
Note 5: Current limit is guaranteed by design and/or correlation to static
test. Slope compensation reduces current limit at higher duty cycles.
Note 6: The outputs of RST and WDO have a weak pull-up to VBIAS of
typically 2.5μA. However, external pull-up resistors may be used when
faster rise times are required or for VOH higher than VBIAS.
Note 7: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed the maximum operating junction temperature
when over-temperature protection is active. Continuous operation above
the specied maximum operating junction temperature may impair device
reliability.
Note 8: All currents into pins are positive; all voltages are referenced to
GND unless otherwise specied.
TYPICAL PERFORMANCE CHARACTERISTICS
Efciency, VOUT = 5V
Efciency, VOUT = 3.3V
Efciency, VOUT = 1.8V
TA = 25°C unless otherwise noted.
LOAD CURRENT (A)
0
0.2
0.4
0.6
0.8
1
65
EFFICIENCY
(%)
85
90
80
70
75
95
3688 G01
fSW = 1MHz
VIN = 12V
LOAD CURRENT (A)
0
0.2
0.4
0.6
0.8
1
60
EFFICIENCY
(%)
80
85
75
65
70
90
3688 G02
fSW = 1MHz
VIN = 12V
LOAD CURRENT (A)
0
0.2
0.4
0.6
0.8
1
55
EFFICIENCY
(%)
75
80
70
60
65
85
3688 G03
fSW = 500kHz
VIN = 12V
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