參數(shù)資料
型號: LT1950EGN
廠商: LINEAR TECHNOLOGY CORP
元件分類: 穩(wěn)壓器
英文描述: Single Switch PWM Controller with Auxiliary Boost Converter
中文描述: 0.18 A SWITCHING CONTROLLER, 560 kHz SWITCHING FREQ-MAX, PDSO16
封裝: 0.150 INCH, PLASTIC, SSOP-16
文件頁數(shù): 11/20頁
文件大小: 285K
代理商: LT1950EGN
LT1950
11
sn1950 1950fs
APPLICATIU
W
U
U
Shutdown and Undervoltage Lockout
Figure 4 shows how to program undervoltage lockout
(UVLO) for the V
IN
supply. Typically, UVLO is used in
situations where the input supply is current limited, or has
a relatively high source resistance. A switching regulator
draws constant power from the source, hence source
current increases as source voltage drops. This looks like
a negative load resistance to the source and can cause the
source to current limit or latch low under low source
voltage conditions. An internally set undervoltage lockout
(UVLO) threshold prevents the regulator from operating at
source voltages where these problems might occur. An
internal comparator will force the part into shutdown
below the minimum V
IN
of 2.6V. This feature can be used
to prevent excessive discharge of battery-operated sys-
tems. Alternatively, UVLO threshold is adjustable. The
shutdown threshold voltage of the SHDN pin is 1.32V.
Forcing the SHDN pin below this 1.32V threshold causes
V
REF
to be disabled and stops switching at the GATE pin.
If the SHDN pin is left open circuit, a permanent 3
μ
A flows
out of the pin to ensure that the pin defaults high to allow
normal operation. Voltages above the 1.32V threshold
cause an extra 7
μ
A to be sourced out of the pin, providing
current hysteresis. This can be used to set voltage hyster-
esis of the UVLO threshold using the following equations:
R
V
V
A
R
V
)
V
(
V
R
A
H
7
L
H
1
2
1 32
1
3
=
μ
=
+ μ
.
–1 32
V
H
= Turn on threshold
V
L
= Turn off threshold
Example: switching should not start until the input is
above 11V and is to stop if the input falls below 9V.
V
H
= 11V
V
L
= 9V
R
V
7
V
A
k
R
V
V
V
k
A
k
1
11
9
286
2
1 32
286
11
(
3
36
=
μ
=
=
+ μ
=
.
–1 32
)
Keep the connections from the resistors to the SHDN pin
short and make sure that the interplane or surface capaci-
tance to the switching nodes are minimized. If high resis-
tance values are used, the SHDN pin should be bypassed
with a 1nF capacitor to prevent coupling problems from
the switch node.
Figure 4. Undervoltage Lockout
3
μ
A
7
μ
A
1.32V
GND
V
REF
V
IN
R1
R2
C1
+
1950 F04
LT1950
Generating V
IN2
Supply Using BOOST Pin
The LT1950’s BOOST pin is used to provide a “boosted”
11V supply at the V
IN2
pin for V
IN
voltages as low as 3V.
Since V
IN2
supplies the output driver for the GATE pin of
the IC, it is advantageous to generate a boosted V
IN2
. This
architecture achieves high GATE drive for an external
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