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參數(shù)資料
| 型號(hào)： | LT1807IS8#TRPBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 13/28頁 |
| 文件大小： | 0K |
| 描述： | IC OPAMP R-R I/O DUAL LN 8SOIC |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 放大器類型： | 通用 |
| 電路數(shù)： | 2 |
| 輸出類型： | 滿擺幅 |
| 轉(zhuǎn)換速率： | 140 V/µs |
| 增益帶寬積： | 325MHz |
| 電流 - 輸入偏壓： | 5µA |
| 電壓 - 輸入偏移： | 100µV |
| 電流 - 電源： | 11mA |
| 電流 - 輸出 / 通道： | 85mA |
| 電壓 - 電源，單路/雙路(±)： | 2.5 V ~ 12.6 V，±1.25 V ~ 6.3 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SO |
| 包裝： | 帶卷 (TR) |
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LT1806/LT1807
20
18067fc
APPLICATIONS INFORMATION
The LT1806/LT1807’s input stages are also protected
against large differential input voltages of 1.4V or higher
by a pair of back-to-back diodes, D5/D8, that prevent
the emitter-base breakdown of the input transistors. The
current in these diodes should be limited to less than 10mA
when they are active. The worst-case differential input
voltage usually occurs when the input is driven while the
output is shorted to ground in a unity gain conguration.
In addition, the amplier is protected against ESD strikes
up to 3kV on all pins by a pair of protection diodes, ESDD1
to ESDD6, on each pin that are connected to the power
supplies as shown in Figure 1.
Capacitive Load
The LT1806/LT1807 are optimized for high bandwidth and
low distortion applications. They can drive a capacitive
load of about 20pF in a unity-gain conguration, and more
for higher gain. When driving a larger capacitive load, a
resistor of 10Ω to 50Ω should be connected between the
output and the capacitive load to avoid ringing or oscilla-
tion. The feedback should still be taken from the output so
that the resistor will isolate the capacitive load to ensure
stability. Graphs on capacitive loads indicate the transient
response of the amplier when driving the capacitive load
with a specied series resistor.
Feedback Components
When feedback resistors are used to set up gain, care must
be taken to ensure that the pole formed by the feedback
resistors and the total capacitance at the inverting input
does not degrade stability. For instance, the LT1806/LT1807
in a noninverting gain of 2, set up with two 1k resistors
and a capacitance of 3pF (part plus PC board) will probably
ring in transient response. The pole is formed at 106MHz
that will reduce phase margin by 34 degrees when the
crossover frequency of the amplier is around 70MHz. A
capacitor of 3pF or higher connected across the feedback
resistor will eliminate any ringing or oscillation.
SHDN Pin
The LT1806 has a SHDN pin to reduce the supply current
to less than 0.9mA. When the SHDN pin is pulled low, it
will generate a signal to power down the device. If the pin
is left unconnected, an internal pull-up resistor of 40k will
keep the part fully operating as shown in Figure 1. The
output will be high impedance during shutdown, and the
turn-on and turn-off time is less than 100ns. Because
the input is protected by a pair of back-to-back diodes,
the input signal will feed through to the output during
shutdown mode if the amplitude of signal between the
inputs is larger than 1.4V.
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| LT1809CS6#TR | 功能描述:IC OPAMP R-R IN/OUT SGL SOT23-6 RoHS:否 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 標(biāo)準(zhǔn)包裝:50 系列:- 放大器類型:通用 電路數(shù):2 輸出類型:滿擺幅 轉(zhuǎn)換速率:1.8 V/µs 增益帶寬積:6.5MHz -3db帶寬:4.5MHz 電流 - 輸入偏壓:5nA 電壓 - 輸入偏移:100µV 電流 - 電源:65µA 電流 - 輸出 / 通道:35mA 電壓 - 電源，單路/雙路(±):1.8 V ~ 5.25 V，±0.9 V ~ 2.625 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:10-TFSOP，10-MSOP（0.118"，3.00mm 寬） 供應(yīng)商設(shè)備封裝:10-MSOP 包裝:管件 |
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