參數(shù)資料
型號: LT1789CS8-10#PBF
廠商: Linear Technology
文件頁數(shù): 10/24頁
文件大?。?/td> 0K
描述: IC AMP INSTR SGL PROG R-R 8-SOIC
標準包裝: 100
放大器類型: 儀表
電路數(shù): 1
轉(zhuǎn)換速率: 0.066 V/µs
增益帶寬積: 25kHz
電流 - 輸入偏壓: 17nA
電壓 - 輸入偏移: 30µV
電流 - 電源: 85µA
電流 - 輸出 / 通道: 8.5mA
電壓 - 電源,單路/雙路(±): 2.2 V ~ 36 V,±1.1 V ~ 18 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SO
包裝: 管件
產(chǎn)品目錄頁面: 1323 (CN2011-ZH PDF)
LT1789-1/LT1789-10
18
1789fc
BLOCK DIAGRAM
Figure 1. Block Diagram
Setting the Gain
The gain of the LT1789-1 and LT1789-10 is set by the
value of resistor RG, applied across pins 1 and 8. For the
LT1789-1, the gain G will be:
G = 1+ 200k/RG
and RG can be calculated from the desired gain by
RG = 200k/(G – 1)
For the LT1789-10, the gain G will be
G =10 (1 + 200k/RG)
and RG can be calculated from the desired gain by
RG = 200k/(0.1 G – 1)
For the lowest achievable gain, RG may be set to infinity
by leaving Pins 1 and 8 open.
Input and Output Offset Voltage
The offset voltage of the LT1789-1/LT1789-10 has two
components: the output offset and the input offset. The
total offset voltage referred to the input (RTI) is found by
dividing the output offset by the programmed gain (G) and
adding it to the input offset. At high gains the input offset
voltage dominates, whereas at low gains the output offset
voltage dominates. The total offset voltage is:
T otal
input
offset
voltage
(R TI)
= input offset + (output offset/G)
To tal
output
offset
voltage
(R TO)
= (input offset G) + output offset
+
3
1
A1
V
+IN
RG
V+
V
V+
5.7k
100k
R1
110k/10k*
VB
+
2
8
A2
V
1789 F01
–IN
RG
V+
5.7k
100k
R3
110k/10k*
R2
110k/100k*
R4
110k/100k*
VB
6 OUT
7 V+
4 V
5 REF
+
A3
*LT1789-1/LT1789-10
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