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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉锛� | LT1784CS6#TRM |
| 寤犲晢锛� | Linear Technology |
| 鏂囦欢闋佹暩(sh霉)锛� | 8/12闋� |
| 鏂囦欢澶у皬锛� | 0K |
| 鎻忚堪锛� | IC OPAMP R-R IN/OUT SOT23-6 |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 1 |
| 绯诲垪锛� | Over-The-Top® |
| 鏀惧ぇ鍣ㄩ鍨嬶細 | 閫氱敤 |
| 闆昏矾鏁�(sh霉)锛� | 1 |
| 杓稿嚭椤炲瀷锛� | 婊挎摵骞� |
| 杞�(zhu菐n)鎻涢€熺巼锛� | 2.2 V/µs |
| 澧炵泭甯跺绌嶏細 | 2.6MHz |
| 闆绘祦 - 杓稿叆鍋忓锛� | 250nA |
| 闆诲 - 杓稿叆鍋忕Щ锛� | 1600µV |
| 闆绘祦 - 闆绘簮锛� | 750µA |
| 闆绘祦 - 杓稿嚭 / 閫氶亾锛� | 27mA |
| 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±)锛� | 2.5 V ~ 18 V锛�±1.25 V ~ 9 V |
| 宸ヤ綔婧害锛� | 0°C ~ 70°C |
| 瀹夎椤炲瀷锛� | 琛ㄩ潰璨艰 |
| 灏佽/澶栨锛� | SOT-23-6 |
| 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | TSOT-23-6 |
| 鍖呰锛� | 鍓垏甯� (CT) |
| 鍏跺畠鍚嶇ū锛� | LT1784CS6 LT1784CS6#TRMCT LT1784CS6-ND |
LT1784
5
1784fa
ELECTRICAL CHARACTERISTICS The l denotes the specications which apply over the specied
temperature range, otherwise specications are at TA = 25掳C. VS = 卤5V, VCM = 0V, VOUT = 0V, for the 6-lead part VPIN5 = V鈥�,
pulse power tested unless otherwise specied.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VIL
SHDN Pin Input Low Voltage
VS = 卤5V (Note 8)
l
鈥�4.7
V
VIH
SHDN Pin Input High Voltage
VS = 卤5V (Note 8)
l
鈥�3
V
tON
Turn-On Time
VPIN5 = 0V to 鈥�5V, RL = 10k (Note 8)
l
18
渭s
tOFF
Turn-Off Time
VPIN5 = 鈥�5V to 0V, RL = 10k (Note 8)
l
2.2
渭s
GBW
Gain Bandwidth Product
f = 5kHz
0掳C 鈮� TA 鈮� 70掳C
鈥�40掳C 鈮� TA 鈮� 85掳C
l
1.55
1.30
1.20
2.6
MHz
SR
Slew Rate
AV = 鈥�1, RL = 鈭�, VO = 卤4V, Measured at VO = 卤2V
0掳C 鈮� TA 鈮� 70掳C
鈥�40掳C 鈮� TA 鈮� 85掳C
l
1.3
1.2
1.1
2.2
V/渭s
FPBW
Full-Power Bandwidth (Note 9)
VOUT = 8VP-P
94
kHz
tS
Settling Time
VS = 5V, 螖VOUT = 4V to 0.1%, AV = 1
3.4
渭s
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: A heat sink may be required to keep the junction temperature
below absolute maximum.
Note 3: VS = 5V limits are guaranteed by correlation to VS = 3V and
VS = 卤5V or VS = 卤9V tests.
Note 4: VS = 3V limits are guaranteed by correlation to VS = 5V and
VS = 卤5V or VS = 卤9V tests.
Note 5: Guaranteed by correlation to slew rate at VS = 卤5V, and GBW at
VS = 5V and VS = 卤5V tests.
Note 6: This specication implies a typical input offset voltage of 5.7mV at
VCM = 18V and a maximum input offset voltage of 18mV at VCM = 18V.
Note 7: This parameter is not 100% tested.
Note 8: Specications apply to 6-lead SOT-23 with shutdown.
Note 9: Full-power bandwidth is calculated from the slew rate.
FPBW = SR/2蟺VP.
Note 10: The LT1784C is guaranteed functional over the operating
temperature range 鈥�40掳C to 85掳C.
Note 11: The LT1784C is guaranteed to meet specied performance from
0掳C to 70掳C. The LT1784C is designed, characterized and expected to
meet specied performance from 鈥�40掳C to 85掳C but is not tested or QA
sampled at these temperatures. LT1784I is guaranteed to meet specied
performance from 鈥�40掳C to 85掳C.
Supply Current vs Supply Voltage
Minimum Supply Voltage
Output Voltage
vs Large Input Voltage
TYPICAL PERFORMANCE CHARACTERISTICS
SUPPLY VOLTAGE (V)
24
8
12
16
SUPPL
Y
CURRENT
(渭A)
18
1784 G01
6
10
14
700
650
600
550
500
450
400
350
300
TA = 125掳C
TA = 25掳C
TA = 鈥�55掳C
TOTAL SUPPLY VOLTAGE (V)
1
INPUT
OFFSET
VOLTAGE
CHANGE
(渭V)
5
1784 G02
2
3
4
400
300
200
100
0
鈥�100
鈥�200
鈥�300
鈥�400
TA = 125掳C
TA = 25掳C
TA = 鈥�55掳C
VIN (V)
鈥�10
V
OUT
(V)
5
4
3
2
1
0
鈥�2
6
10
1784 G03
鈥�6
2
14
18
VS = 5V, 0V
+
鈥�
5V
VIN
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