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參數(shù)資料
| 型號： | LT1636IDD#TR |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 3/16頁 |
| 文件大小： | 0K |
| 描述： | IC OP AMP SGL R-R IN/OUT 8-DFN |
| 標準包裝： | 2,500 |
| 系列： | Over-The-Top® |
| 放大器類型： | 通用 |
| 電路數(shù)： | 1 |
| 輸出類型： | 滿擺幅 |
| 轉(zhuǎn)換速率： | 0.075 V/µs |
| 增益帶寬積： | 220kHz |
| 電流 - 輸入偏壓： | 4nA |
| 電壓 - 輸入偏移： | 125µV |
| 電流 - 電源： | 50µA |
| 電流 - 輸出 / 通道： | 30mA |
| 電壓 - 電源，單路/雙路(±)： | 2.7 V ~ 44 V，±1.35 V ~ 22 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-WFDFN 裸露焊盤 |
| 供應商設(shè)備封裝： | 8-DFN-EP（3x3） |
| 包裝： | 帶卷 (TR) |
11
LT1636
1636fc
APPLICATIONS INFORMATION
WU
U
The normally reverse biased substrate diode from the
output to V– will cause unlimited currents to flow when the
output is forced below V–. If the current is transient and
limited to 100mA, no damage will occur.
The LT1636 is internally compensated to drive at least
200pF of capacitance under any output loading condi-
tions. A 0.22
F capacitor in series with a 150 resistor
between the output and ground will compensate these
amplifiers for larger capacitive loads, up to 10,000pF, at
all output currents.
Distortion
There are two main contributors of distortion in op amps:
output crossover distortion as the output transitions from
sourcing to sinking current and distortion caused by
nonlinear common mode rejection. Of course, if the op
amp is operating inverting there is no common mode
induced distortion. When the LT1636 switches between
input stages there is significant nonlinearity in the CMRR.
Lower load resistance increases the output crossover
distortion, but has no effect on the input stage transition
distortion. For lowest distortion the LT1636 should be
operated single supply, with the output always sourcing
current and with the input voltage swing between ground
and (V+ – 0.8V). See the Typical Performance Character-
istics curves.
Gain
The open-loop gain is less sensitive to load resistance
when the output is sourcing current. This optimizes per-
formance in single supply applications where the load is
returned to ground. The typical performance photo of
Open-Loop Gain for various loads shows the details.
Shutdown
The LT1636 can be shut down two ways: using the
shutdown pin or bringing V+ to within 0.5V of V–. When V+
is brought to within 0.5V of V– both the supply current and
output leakage current drop to less than 1nA. When the
shutdown pin is brought 1.2V above V –, the supply
current drops to about 4
A and the output leakage current
is less than 1
A,independentofV+.Ineithercasetheinput
bias current is less than 0.1nA (even if the inputs are 44V
above the negative supply).
The shutdown pin can be taken up to 32V above V –. The
shutdown pin can be driven below V –, however the pin
current through the substrate diode should be limited with
an external resistor to less than 10mA.
Input Offset Nulling
The input offset voltage can be nulled by placing a 10k
potentiometer between Pins 1 and 8 with its wiper to V–
(see Figure 1). The null range will be at least
±1mV.
LT1636
10k
1636 F01
V –
1
8
Figure 1. Input Offset Nulling
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