參數(shù)資料
型號: LT1507IS8#TR
廠商: LINEAR TECHNOLOGY CORP
元件分類: 穩(wěn)壓器
英文描述: 3 A SWITCHING REGULATOR, 570 kHz SWITCHING FREQ-MAX, PDSO8
封裝: 0.150 INCH, PLASTIC, SO-8
文件頁數(shù): 14/20頁
文件大?。?/td> 291K
代理商: LT1507IS8#TR
3
LT1507
ELECTRICAL CHARACTERISTICS
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Switch Frequency
VC Set to Give 50% Duty Cycle
460
500
540
kHz
–25
°C ≤ TJ ≤ 125°C
440
560
kHz
TJ ≤ –25°C
440
570
kHz
Switch Frequency Line Regulation
4.3V
≤ VIN ≤ 15V
q
0.05
0.15
%/V
Frequency Shifting Threshold on FB Pin
f = 10kHz
q
0.8
1.0
1.3
V
Minimum Input Voltage (Note 2)
q
4
4.3
V
Minimum Boost Voltage (Note 3)
ISW ≤ 1.5A
q
3
3.5
V
Boost Current (Note 4)
VBOOST = VIN + 5V
ISW = 500mA, –25°C ≤ TJ ≤ 125°C12
22
mA
TJ ≤ –25°C25
mA
ISW = 1.5A,
–25
°C ≤ TJ ≤ 125°C25
35
mA
TJ ≤ –25°C40
mA
Input Supply Current (Note 5)
q
3.8
5.4
mA
Shutdown Supply Current
VSHDN = 0V, VIN ≤ 12V
15
50
A
VSW = 0V, VC Open
q
75
A
Lockout Threshold
VC Open
q
2.3
2.38
2.46
V
Shutdown Threshold
VC Open
Device Shutting Down
q
0.15
0.37
0.70
V
Device Starting Up
q
0.25
0.45
0.70
V
Minimum Synchronizing Amplitude
q
1.5
2.2
V
Synchronizing Frequency Range (Note 7)
580
1000
kHz
The q denotes specifications which apply over the operating temperature
range.
Note 1: Gain is measured with a VC swing equal to 200mV above the low
clamp level to 200mV below the upper clamp level.
Note 2: Minimum input voltage is not measured directly, but is guaranteed
by other tests. It is defined as the voltage where internal bias lines are still
regulated, so that the reference voltage and oscillator frequency remain
constant. Actual minimum input voltage to maintain a regulated output will
depend on output voltage and load current. See Applications Information.
Note 3: This is the minimum voltage across the boost capacitor needed to
guarantee full saturation of the internal power switch.
Note 4: Boost current is the current flowing into the BOOST pin with the
pin held 5V above input voltage. It flows only during switch ON time.
Note 5: Input supply current is the bias current drawn by the VIN pin when
the SHDN pin is held at 1V (switching disabled).
Note 6: Switch ON resistance is calculated by dividing VIN to VSW voltage
by the forced current (1.5A). See Typical Performance Characteristics for
the graph of switch voltage at other currents.
Note 7: For synchronizing frequency above 700kHz, with duty cycles
above 50%, external slope compensation may be needed. See Applications
Information.
Note 8: Transconductance and voltage gain refer to the internal amplifier
exclusive of the voltage divider. To calculate gain and transconductance
refer to SENSE pin on fixed voltage parts. Divide values shown by the ratio
VOUT/2.42.
TJ = 25°C, VIN = 5V, VC = 1.5V, boost open, switch open unless otherwise specified.
VC Pin Shutdown Threshold
JUNCTION TEMPERATURE (
°C)
–50
2.44
2.43
2.42
2.41
2.40
100
LT1507 TPC03
–25
0
25
50
75
125
FEEDBACK
VOLTAGE
(V)
CURRENT
(
A)
2.0
1.5
1.0
0.5
0
VOLTAGE
CURRENT
LOAD CURRENT (A)
0
EFFICIENCY
(%)
100
90
80
70
60
50
1.00
LT1507 TA02
0.25
0.50
0.75
1.25
VIN = 5V
VOUT = 3.3V
Switch Peak Current Limit
Feedback Pin Voltage and Current
JUNCTION TEMPERATURE (
°C)
–50
1.4
1.2
1.0
0.8
0.6
0.4
100
LT1507 TPC01
–25
0
25
50
75
125
THRESHOLD
VOLTAGE
(V)
TYPICAL PERFORMANCE CHARACTERISTICS
U
W
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