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參數(shù)資料
| 型號： | LT1470 |
| 廠商： | Linear Technology Corporation |
| 英文描述： | Single and Dual PCMCIA Protected 3.3V/5V VCC Switches |
| 中文描述： | 單路和雙路的PCMCIA保護(hù)3.3V/5V的虛擬通道連接開關(guān) |
| 文件頁數(shù)： | 6/12頁 |
| 文件大?。?/td> | 229K |
| 代理商： | LT1470 |
6
LTC1470/LTC1471
OPERATIO
U
The LTC1470 (or 1/2 of the LTC1471) consists of the
following functional blocks:
Input TTL/CMOS Converters
The enable inputs are designed to accommodate a wide
range of 3V and 5V logic families. The input threshold
voltage is approximately 1.4V with approximately 100mV
of hysteresis. The inputs enable the bias generator, the
gate charge pumps and the protection circuity which are
powered from the 5V supply. Therefore, when the inputs
are turned off, the entire circuit is powered down and the
5V
supply current drops below 1
μ
A.
XOR Input Circuitry
By employing an XOR function, which locks out the 3.3V
switch when the 5V switch is turned on and locks out the
5V switch when the 3.3V switch is turned on, there is no
danger of both switches being on at the same time. This
XOR function also makes it possible to work with either
active -low or active-high PCMCIA V
CC
switch control logic
(see Applications Information section for further details).
Break-Before-Make Switch Control
Built-in delays are provided to ensure that the 3.3V and 5V
switches are non-overlapping. Further, the gate charge
pump includes circuitry which ramps the NMOS switches
on slowly (400
μ
s typical rise time) but turns them off
much more quickly (typically 10
μ
s).
Bias, Oscillator and Gate Charge Pump
When either the 3.3V or 5V switch is enabled, a bias
current generator and high frequency oscillator are turned
on. The on-chip capacitive charge pump generates ap-
proximately 12V of gate drive for the internal low R
DS(ON)
NMOS V
CC
switches from the 5V
IN
power supply. There-
fore, an external 12V supply is not required to switch the
V
CC
output. The 5V
IN
supply current drops below 1
μ
A
when both switches are turned off.
Gate Charge and Discharge Control
All switches are designed to ramp on slowly (400
μ
s typical
rise time). Turn-off time is much quicker (typically 10
μ
s).
To ensure that both V
CC
NMOS switch gates are fully
discharged, program the switch to the high impedance
mode at least 100
μ
s before turning off the 5V power
supply.
Switch Protection
Both switches are protected against accidental short cir-
cuits with SafeSlot foldback current limit circuits which
limit the output current to typically 1A when the output is
shorted to ground. Both switches also have thermal shut-
down which limits the power dissipation to safe levels.
APPLICATIO
S I
FOR
ATIO
U
The LTC1470/LTC1471 are designed to interface directly
with industry standard PCMCIA card controllers.
W
U
U
Figure 1. Direct Interface to CL-PD6710 PCMCIA Controller
LTC1470
EN0
EN1
3V
IN
5V
IN
3V
IN
OUT
OUT
GND
+
3.3V
5V
0.1
μ
F
0.1
μ
F
1
μ
F
TANT
10k
(OFF/3.3V/5V)
TO CARD
V
CC
PINS
CL-PD6710
V
CC
_5
V
CC
_3
1470/71 F01
Interfacing with the CL-PD6710
Figure 1 is a schematic diagram showing the LTC1470
interfaced with a standard PCMCIA slot controller. The
LTC1470 accepts logic control directly from the CL-PD6710.
The XOR input function allows the LTC1470 to interface
directly to the active-low V
CC
control outputs of the CL-
PD6710 for 3.3V/5V voltage selection (see the following
Switch Truth Table). Therefore, no “glue” logic is required
to interface to this PCMCIA compatible card controller.
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