(AV = 1) TYPICAL PERFOR<" />
參數(shù)資料
型號: LT1361CN8
廠商: Linear Technology
文件頁數(shù): 12/12頁
文件大?。?/td> 0K
描述: IC OP-AMP HI-SPD 50MHZ DUAL 8DIP
標(biāo)準(zhǔn)包裝: 50
系列: C-Load™
放大器類型: 電壓反饋
電路數(shù): 2
轉(zhuǎn)換速率: 800 V/µs
增益帶寬積: 50MHz
電流 - 輸入偏壓: 300nA
電壓 - 輸入偏移: 300µV
電流 - 電源: 4mA
電流 - 輸出 / 通道: 34mA
電壓 - 電源,單路/雙路(±): ±2.5 V ~ 15 V
工作溫度: 0°C ~ 70°C
安裝類型: 通孔
封裝/外殼: 8-DIP(0.300",7.62mm)
供應(yīng)商設(shè)備封裝: 8-PDIP
包裝: 管件
9
LT1361/LT1362
Small-Signal Transient
(AV = 1)
TYPICAL PERFORMANCE CHARACTERISTICS
U
W
Small-Signal Transient
(AV = –1)
Small-Signal Transient
(AV = –1, CL = 500pF)
1361/1362 TA31
1361/1362 TA32
1361/1362 TA33
Large-Signal Transient
(AV = 1, CL = 10,000pF)
Large-Signal Transient
(AV = –1)
Large-Signal Transient
(AV = 1)
1361/1362 TA36
1361/1362 TA34
1361/1362 TA35
APPLICATIONS INFORMATION
WU
U
Layout and Passive Components
The LT1361/LT1362 amplifiers are easy to use and toler-
ant of less than ideal layouts. For maximum performance
(for example, fast 0.01% settling) use a ground plane,
short lead lengths, and RF-quality bypass capacitors
(0.01
F to 0.1F). For high drive current applications use
low ESR bypass capacitors (1
F to 10F tantalum). The
parallel combination of the feedback resistor and gain
setting resistor on the inverting input combine with the
input capacitance to form a pole which can cause peaking
or oscillations. If feedback resistors greater than 5k
are
used, a parallel capacitor of value
CF > RG x CIN/RF
should be used to cancel the input pole and optimize
dynamic performance. For unity-gain applications where
a large feedback resistor is used, CF should be greater
than or equal to CIN.
Input Considerations
Each of the LT1361/LT1362 inputs is the base of an NPN
and a PNP transistor whose base currents are of opposite
polarity and provide first-order bias current cancellation.
Because of variation in the matching of NPN and PNP beta,
the polarity of the input bias current can be positive or
negative. The offset current does not depend on NPN/PNP
beta matching and is well controlled. The use of balanced
source resistance at each input is recommended for
applications where DC accuracy must be maximized.
The inputs can withstand transient differential input volt-
ages up to 10V without damage and need no clamping or
source resistance for protection. Differential inputs, how-
ever, generate large supply currents (tens of mA) as
required for high slew rates. If the device is used with
sustained differential inputs, the average supply current
will increase, excessive power dissipation will result and
the part may be damaged. The part should not be used as
a comparator, peak detector or other open-loop applica-
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