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參數(shù)資料
| 型號： | LT1207CS#TRPBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 16/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CURRNT FEEDBK AMP DUAL 16SOIC |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 放大器類型： | 電流反饋 |
| 電路數(shù)： | 2 |
| 轉(zhuǎn)換速率： | 900 V/µs |
| -3db帶寬： | 60MHz |
| 電流 - 輸入偏壓： | 10µA |
| 電壓 - 輸入偏移： | 3000µV |
| 電流 - 電源： | 20mA |
| 電流 - 輸出 / 通道： | 1.2A |
| 電壓 - 電源，單路/雙路(±)： | 10 V ~ 30 V，±5 V ~ 15 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SO |
| 包裝： | 帶卷 (TR) |
9
LT1207
U
S
A
O
PPLICATI
WU
U
I FOR ATIO
FREQUENCY (MHz)
1
–8
VOLTAGE
GAIN
(dB)
–4
0
4
8
10
100
LT1207 F01
–6
–2
2
6
10
12
VS = ±15V
RF = 1.2k
COMPENSATION
RF = 2k
NO COMPENSATION
RF = 2k
COMPENSATION
Figure 1.
The network has the greatest effect for CL in the range of
0pF to 1000pF. The graph of Maximum Capacitive Load vs
Feedback Resistor can be used to select the appropriate
value of the feedback resistor. The values shown are for
0.5dB and 5dB peaking at a gain of 2 with no resistive load.
This is a worst-case condition, as the amplifier is more stable
at higher gains and with some resistive load in parallel with
the capacitance. Also shown is the –3dB bandwidth with the
suggested feedback resistor vs the load capacitance.
Although the optional compensation works well with
capacitive loads, it simply reduces the bandwidth when it
is connected with resistive loads. For instance, with a 30
load, the bandwidth drops from 55MHz to 35MHz when
the compensation is connected. Hence, the compensation
was made optional. To disconnect the optional compensa-
tion, leave the COMP pin open.
Shutdown/Current Set
If the shutdown feature is not used, the Shutdown pins
must be connected to ground or V –.
Each amplifier has a separate Shutdown pin which can be
used to either turn off the amplifier, which reduces the
amplifier supply current to less than 200
A, or to control
the supply current in normal operation.
The supply current in each amplifier is controlled by the
current flowing out of the Shutdown pin. When the Shut-
down pin is open or driven to the positive supply, the
amplifier is shut down. In the shutdown mode, the output
looks like a 40pF capacitor and the supply current is
typically 100
A. Each Shutdown pin is referenced to the
positive supply through an internal bias circuit (see the
Simplified Schematic). An easy way to force shutdown is
to use open drain (collector) logic. The circuit shown in
Figure 2 uses a 74C904 buffer to interface between 5V
logic and the LT1207. The switching time between the
active and shutdown states is less than 1
s. A 24k pull-up
resistor speeds up the turn-off time and insures that the
amplifier is completely turned off. Because the pin is
referenced to the positive supply, the logic used should
have a breakdown voltage of greater than the positive
supply voltage. No other circuitry is necessary as the
internal circuit limits the Shutdown pin current to about
500
A. Figure 3 shows the resulting waveforms.
Figure 2. Shutdown Interface
–
+
1/2 LT1207
SHDN
15V
–15V
RF
RG
VIN
5V
24k
ENABLE
VOUT
LT1207 F02
15V
74C906
For applications where the full bandwidth of the amplifier
is not required, the quiescent current may be reduced by
connecting a resistor from the Shutdown pin to ground.
Figure 3. Shutdown Operation
LT1207 F3
AV = 1
RF = 825
RL = 50
RPU = 24k
VIN = 1VP-P
ENABLE
V
OUT
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