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參數(shù)資料
| 型號： | LT1028CSW#PBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 24/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC OP-AMP LOW NOISE SNGL 16-SOIC |
| 標準包裝： | 47 |
| 放大器類型： | 通用 |
| 電路數(shù)： | 1 |
| 轉(zhuǎn)換速率： | 15 V/µs |
| 增益帶寬積： | 75MHz |
| 電流 - 輸入偏壓： | 30nA |
| 電壓 - 輸入偏移： | 20µV |
| 電流 - 電源： | 7.6mA |
| 電壓 - 電源，單路/雙路(±)： | ±4 V ~ 18 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SO |
| 包裝： | 管件 |
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LT1028/LT1128
5
1028fb
LT1028AC
LT1128AC
LT1028C
LT1128C
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
VOS
Input Offset Voltage
l
20
95
35
150
V
VOS
Temp
Average Input Offset Drift
(Note 8)
l
0.2
0.8
0.25
1.0
V/°C
IOS
Input Offset Current
VCM = 0V
l
20
80
28
160
nA
IB
Input Bias Current
VCM = 0V
l
±35
±140
±45
±280
nA
Input Voltage Range
l
±10.4
±11.8
±10.4
±11.8
V
CMRR
Common Mode Rejection Ratio
VCM = ±10.5V
l
108
123
102
123
dB
PSRR
Power Supply Rejection Ratio
VS = ±4.5V to ±18V
l
112
131
106
131
dB
AVOL
Large-Signal Voltage Gain
RL ≥ 2k, VO = ±10V
RL ≥ 1k, VO = ±10V
l
4.0
3.0
20.0
14.0
2.5
2.0
20.0
14.0
V/V
VOUT
Maximum Output Voltage Swing
RL ≥ 2k
l
±11.0
±12.5
±11.0
±12.5
V
IS
Supply Current
l
8.5
11.0
8.7
12.5
mA
The l denotes the specifications which apply over the operating
temperature range –40°C ≤ TA ≤ 85°C. VS = ±15V, unless otherwise noted. (Note 11)
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Input Offset Voltage measurements are performed by automatic
test equipment approximately 0.5 sec. after application of power. In
addition, at TA = 25°C, offset voltage is measured with the chip heated
to approximately 55°C to account for the chip temperature rise when the
device is fully warmed up.
Note 3: Long Term Input Offset Voltage Stability refers to the average
trend line of Offset Voltage vs Time over extended periods after the first 30
days of operation. Excluding the initial hour of operation, changes in VOS
during the first 30 days are typically 2.5V.
Note 4: This parameter is tested on a sample basis only.
Note 5: 10Hz noise voltage density is sample tested on every lot with the
exception of the S8 and S16 packages. Devices 100% tested at 10Hz are
available on request.
Note 6: Current noise is defined and measured with balanced source
resistors. The resultant voltage noise (after subtracting the resistor noise
on an RMS basis) is divided by the sum of the two source resistors to
obtain current noise. Maximum 10Hz current noise can be inferred from
100% testing at 1kHz.
Note 7: Gain-bandwidth product is not tested. It is guaranteed by design
and by inference from the slew rate measurement.
Note 8: This parameter is not 100% tested.
Note 9: The inputs are protected by back-to-back diodes. Current-limiting
resistors are not used in order to achieve low noise. If differential input
voltage exceeds ±1.8V, the input current should be limited to 25mA.
Note 10: This parameter guaranteed by design, fully warmed up at TA
= 70°C. It includes chip temperature increase due to supply and load
currents.
Note 11: The LT1028/LT1128 are designed, characterized and expected to
meet these extended temperature limits, but are not tested at –40°C and
85°C. Guaranteed I-grade parts are available. Consult factory.
elecTrical characTerisTics
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