參數(shù)資料
型號: LT1015
廠商: Linear Technology Corporation
英文描述: High Speed Dual Line Receiver(高速雙路線性接收器)
中文描述: 高速雙線路接收器(高速雙路線性接收器)
文件頁數(shù): 2/4頁
文件大?。?/td> 154K
代理商: LT1015
2
LT1015
ORDER PART
NUMBER
Supply Voltage .......................................................... 7V
Differential Input Voltage ........................................... 5V
Input Voltage
Positive................................................ Supply + 0.5V
Negative ..............................................................–1V
Input Current (Forced) Positive ............................ 20mA
Latch Pin Voltage........................................ Supply + 1V
Output Current (Continuous) ..............................
±
20mA
Operating Temperature Range
LT1015C..................................................0
°
C to 70
°
C
LT1015M........................................ –55
°
C to 125
°
C*
Storage Temperature............................ –65
°
C to 150
°
C
Lead Temperature (Soldering, 10 sec)..................300
°
C
*Air flow must be provided for T
A
> 100
°
C
ABSOLUTE
AXI
U
RATIU
W
W
W
PACKAGE/ORDER I
FOR
ATIO
W
U
U
Consult factory for Industrial grade parts.
V
+
= 4.6V to 5.4V, V
LATCH
= 0V, common mode input voltage = 2.5V, T
J
= 25
°
C, unless otherwise noted.
ELECTRICAL CHARACTERISTICS
PARAMETER
Input Offset Voltage (Note 1)
Input Bias Current
Reference Input Current
Voltage Gain (Note 3)
Common Mode Input Range (Note 5) Minimum Input
CONDITIONS
V
CM
= 1.25V to (V
+
– 1.5V)
V
IN
= 0V (Note 2)
V
IN
= 0V (Note 2)
V
OUT
= 0.5V to 2.5V, Load = 1 TTL Gate
MIN
TYP
1
15
30
2500
1.0
V
+
– 1.0
MAX
20
30
60
UNITS
mV
G
G
μ
A
μ
A
V/V
G
G
1000
G
G
1.25
V
V
V
V
Maximum Input
I
OUT
= 4mA
I
SINK
= 4mA
V
+
= 5V
Device Latched
Device Active
V
+
– 1.5
2.5
Output High Voltage
Output Low Voltage
Supply Current
Latch Pin High Input Voltage
Latch Pin Low Input Voltage
Latch Pin Current
Propagation Delay
G
G
0.3
55
0.5
70
2
G
mA
G
V
V
G
0.8
G
1
mA
V
IN
20mV (Note 4)
0
°
C
T
J
100
°
C
–55
°
C
T
J
150
°
C
G
G
7
7
10
10
2
14
16
ns
ns
ns
Latch Setup Time
LT1015CJ8
LT1015CN8
LT1015MJ8
1
2
3
4
8
7
6
5
TOP VIEW
INPUT A
REFERENCE
INPUT B
LATCH
V
+
OUTPUT A
GND
OUTPUT B
J8 PACKAGE
8-LEAD CERDIP
N8 P
8-LEAD PDIP
T
JMAX
= 150
°
C,
θ
JA
= 100
°
C/W (J8)
T
JMAX
= 100
°
C,
θ
JA
= 130
°
C/W (N8)
The
G
denotes specifications which apply over the full operating
temperature range.
Note 1:
Input offset voltage is the maximum required to drive the output to
a low state of 0.5V and high state of 2.5V.
Note 2:
Input currents are measured by applying a large positive
differential input voltage. The resulting input current is divided by two to
obtain input current at
V
IN
= 0V.
Note 3:
Voltage gain is guaranteed by design, but not tested.
Note 4:
Propagation delay is sample tested in production with a large
overdrive. The limit is guard banded to account for the slight increase
(
500ps) at 20mV overdrive.
Note 5:
Common mode input range is the voltage range over which the
differential input offset voltage is less than 20mV. If both inputs remain
inside this common mode range, propagation delay will be unaffected. It
will also be normal if the signal input is below the 1.25V lower limit when
the input transition begins. An increase in propagation delay of up to 10ns
may occur if the signal input is above the upper common mode limit when
the transition begins. Sine wave inputs may not be affected when the peak
exceeds the common mode range if the signal is inside the common mode
range for 10ns before threshold is reached.
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