TYPICAL PERFORMANCE CHARA" />
參數(shù)資料
型號(hào): LT1001ACN8#PBF
廠商: Linear Technology
文件頁數(shù): 13/16頁
文件大小: 0K
描述: IC PRECISION OP-AMP SINGLE 8-DIP
標(biāo)準(zhǔn)包裝: 50
放大器類型: 通用
電路數(shù): 1
轉(zhuǎn)換速率: 0.25 V/µs
增益帶寬積: 800kHz
電流 - 輸入偏壓: 500pA
電壓 - 輸入偏移: 10µV
電壓 - 電源,單路/雙路(±): ±3 V ~ 18 V
工作溫度: 0°C ~ 125°C
安裝類型: 通孔
封裝/外殼: 8-DIP(0.300",7.62mm)
供應(yīng)商設(shè)備封裝: 8-PDIP
包裝: 管件
產(chǎn)品目錄頁面: 1316 (CN2011-ZH PDF)
6
LT1001
1001fb
TYPICAL PERFORMANCE CHARACTERISTICS
U
W
Voltage Follower Overshoot
vs Capacitive Load
Small Signal Transient Response
1001 G22
AV = +1, CL = 50pF
1001 G19
Large Signal Transient Response
FREQUENCY (kHz)
1
OUTPUT
VOLTAGE,
PEAK-TO-PEAK
(V)
28
24
20
16
12
8
4
0
10
100
1000
1001 G23
VS = ±15V
TA = 25°C
Maximum Undistorted
Output vs. Frequency
FREQUENCY (Hz)
1
OUTPUT
IMPEDANCE
(
)
100
10
1
0.1
0.01
0.001
10k
1001 G24
10
100
1k
100k
AV = 1000
AV = +1
IO = ±1mA
VS = ±15V
TA = 25°C
Closed Loop Output Impedance
AV = +1, CL = 1000pF
1001 G21
Small Signal Transient Response
CAPACITIVE LOAD (pF)
100
PERCENT
OVERSHOOT
1001 G20
1000
10,000
100,000
100
80
60
40
20
0
VS = ±15V
TA = 25°C
VIN = 100mV
RL > 50k
Application Notes and Test Circuits
The LT1001 series units may be inserted directly into
OP-07, OP-05, 725, 108A or 101A sockets with or without
removal of external frequency compensation or nulling
components. The LT1001 can also be used in 741, LF156
or OP-15 applications provided that the nulling circuitry is
removed.
The LT1001 is specified over a wide range of power supply
voltages from
±3V to ±18V. Operation with lower supplies
is possible down to
±1.2V (two Ni-Cad batteries). How-
ever, with
±1.2V supplies, the device is stable only in
closed loop gains of +2 or higher (or inverting gain of one
or higher).
APPLICATIONS INFORMATION
WU
U
Unless proper care is exercised, thermocouple effects
caused by temperature gradients across dissimilar metals
at the contacts to the input terminals, can exceed the
inherent drift of the amplifier. Air currents over device
leads should be minimized, package leads should be
short, and the two input leads should be as close together
as possible and maintained at the same temperature.
Test Circuit for Offset Voltage and its Drift with Temperature
+
–15V
LT1001
+15V
*50k
*
100
*
50k
2
3
7
6
VO
1001 F01
VO = 1000VOS
* RESISTORS MUST HAVE LOW
THERMOELECTRIC POTENTIAL.
** THIS CIRCUIT IS ALSO USED AS THE BURN-IN
CONFIGURATION FOR THE LT1001, WITH SUPPLY
VOLTAGES INCREASED TO
±20V.
4
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