參數(shù)資料
型號(hào): LPC2927FBD144
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: ARM9 microcontroller with CAN, LIN, and USB
中文描述: 32-BIT, FLASH, 125 MHz, RISC MICROCONTROLLER, PQFP144
封裝: 20 X 20 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT486-1, LQFP-144
文件頁數(shù): 65/95頁
文件大?。?/td> 1855K
代理商: LPC2927FBD144
LPC2926_27_29
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 5 — 28 September 2010
65 of 95
NXP Semiconductors
LPC2926/2927/2929
ARM9 microcontroller with CAN, LIN, and USB
[1]
All parameters are guaranteed over the virtual junction temperature range by design. Pre-testing is performed at T
amb
= 85
°
C on wafer
level. Cased products are tested at T
amb
= 25
°
C (final testing). Both pre-testing and final testing use correlated test conditions to cover
the specified temperature and power-supply voltage range.
[2]
Leakage current is exponential to temperature; worst-case value is at 85
°
C T
vj
. All clocks off. Analog modules and flash powered down.
V
DDA(ADC3V3)
must correlate with V
DDA(ADC5V0)
: V
DDA(ADC3V3)
= V
DDA(ADC5V0)
/ 1.5.
V
DDA(ADC5V0)
must correlate with V
DDA(ADC3V3)
: V
DDA(ADC5V0)
= V
DDA(ADC3V3)
×
1.5.
Not 5 V-tolerant when pull-up is on.
[3]
[4]
[5]
[6]
For I/O Port 0, the maximum input voltage is defined by V
I(ADC)
.
For Port 0, pin 0 to pin 15 add maximum 1.5 pF for input capacitance to ADC. For Port 0, pin 16 to pin 31 add maximum 1.0 pF for input
capacitance to ADC.
[7]
[8]
C
xtal
is crystal load capacitance and C
ext
are the two external load capacitors.
This parameter is not part of production testing or final testing, hence only a typical value is stated. Maximum and minimum values are
based on simulation results.
[9]
[10] The power-up reset has a time filter: V
DD(CORE)
must be above V
trip(high)
for 2
μ
s before reset is de-asserted; V
DD(CORE)
must be below
V
trip(low)
for 11
μ
s before internal reset is asserted.
I
OL
LOW-level output current
at V
OL
= 0.3 V; without
33
Ω
external series
resistor
at V
OL
= 0.3 V; with 33
Ω
external series resistor
drive high; pad
connected to ground
drive high; pad
connected to V
DD(IO)
26.7
-
57.2
mA
5.0
-
5.5
mA
I
OHS
HIGH-level short-circuit
output current
LOW-level short-circuit
output current
-
-
90.0
mA
I
OLS
-
-
95.1
mA
Oscillator
V
XIN_OSC
R
s(xtal)
voltage on pin XIN_OSC
crystal series resistance
0
-
1.8
V
f
osc
= 10 MHz to 15 MHz
C
xtal
= 10 pF;
C
ext
= 18 pF
C
xtal
= 20 pF;
C
ext
= 39 pF
f
osc
= 15 MHz to 20 MHz
C
xtal
= 10 pF;
C
ext
= 18 pF
of XIN_OSC
[8]
-
-
160
Ω
-
-
60
Ω
[8]
-
-
80
Ω
C
i
Power-up reset
V
trip(high)
V
trip(low)
V
trip(dif)
input capacitance
[9]
-
2
pF
high trip level voltage
low trip level voltage
difference between high
and low trip level voltage
[10]
1.1
1.4
1.3
120
1.6
1.5
180
V
V
mV
[10]
1.0
[10]
50
Table 34.
V
DD(CORE)
= V
DD(OSC_PLL)
; V
DD(IO)
= 2.7 V to 3.6 V; V
DDA(ADC3V3)
= 3.0 V to 3.6 V; V
DDA(ADC5V0)
= 3.0 V to 5.5 V;
T
vj
=
40
°
C to +85
°
C; all voltages are measured with respect to ground; positive currents flow into the IC; unless otherwise
specified.
[1]
Symbol
Parameter
Conditions
Static characteristics
…continued
Min
Typ
Max
Unit
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