參數(shù)資料
型號： LPC2468FBD208
廠商： NXP Semiconductors N.V.
元件分類： 數(shù)學處理器
英文描述： Single-chip 16-bit-32-bit micro; 512 kB flash, Ethernet, CAN, ISP-IAP, USB 2.0 device-host-OTG, external memory interface
封裝： LPC2468FBD208<SOT459-1 (LQFP208)|<<http://www.nxp.com/packages/SOT459-1.html<1<Always Pb-free,;LPC2468FET208<SOT950-1 (TFBGA208)|<<http://www.nxp.com/packages/SOT950-1.ht
文件頁數(shù)： 73/85頁
文件大小： 682K
代理商： LPC2468FBD208
LPC2468
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 6.1 — 6 September 2011
73 of 85
NXP Semiconductors
LPC2468
Single-chip 16-bit/32-bit micro
14.2 Crystal oscillator XTAL input and component selection
The input voltage to the on-chip oscillators is limited to 1.8 V. If the oscillator is driven by a
clock in slave mode, it is recommended that the input be coupled through a capacitor with
C
i
= 100 pF. To limit the input voltage to the specified range, choose an additional
capacitor to ground C
g
which attenuates the input voltage by a factor C
i
/ (C
i
+ C
g
). In
slave mode, a minimum of 200 mV (RMS) is needed.
Fig 26. LPC2468 USB OTG port configuration: USB port 1 host, USB port 2 host
USB_UP_LED1
USB_D+1
USB_D
1
USB_PWRD1
USB_PWRD2
15 k
Ω
15 k
Ω
15 k
Ω
15 k
Ω
LPC24XX
USB-A
connector
USB-A
connector
33
Ω
33
Ω
33
Ω
33
Ω
002aad596
V
DD
USB_UP_LED2
V
DD
USB_OVRCR1
USB_OVRCR2
USB_PPWR1
LM3526-L
ENA
ENB
IN
5 V
FLAGA
OUTA
OUTB
FLAGB
V
DD
V
DD
D+
D
D+
D
V
BUS
V
BUS
USB_PPWR2
USB_D+2
USB_D
2
V
SSIO,
V
SSCORE
V
SSIO,
V
SSCORE
Fig 27. Slave mode operation of the on-chip oscillator
LPC2xxx
XTAL1
Ci
100 pF
Cg
002aae718
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