參數(shù)資料
型號(hào)： LPC2368
廠商： NXP Semiconductors N.V.
英文描述： Single-chip 16-bit/32-bit microcontrollers; up to 512 kB flash with ISP/IAP, Ethernet, USB 2.0, CAN, and 10-bit ADC/DAC
中文描述： 單芯片16-bit/32-bit微控制器，高達(dá)512的ISP /國(guó)際檢察官聯(lián)合會(huì)，以太網(wǎng)，USB 2.0，CAN和10 kB閃存位的ADC / DAC
文件頁(yè)數(shù)： 12/48頁(yè)
文件大?。?/td> 377K
代理商： LPC2368
LPC2364_66_68_1
Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Preliminary data sheet
Rev. 01 — 22 September 2006
12 of 48
Philips Semiconductors
LPC2364/2366/2368
Fast communication chip
7.
Functional description
7.1 Architectural overview
The LPC2364/66/68 microcontroller consists of an ARM7TDMI-S CPU with emulation
support, the ARM7 Local Bus for closely coupled, high speed access to the majority of
on-chip memory, the AMBA Advanced High-performance Bus (AHB) interfacing to high
speed on-chip peripherals, and the AMBA Advanced Peripheral Bus (APB) for connection
to other on-chip peripheral functions. The microcontroller permanently configures the
ARM7TDMI-S processor for little-endian byte order.
TDI
2
I
TDI —
Test Data in for JTAG interface.
TMS
3
I
TMS —
Test Mode Select for JTAG interface.
TRST
4
I
TRST —
Test Reset for JTAG interface.
TCK
5
I
TCK —
Test Clock for JTAG interface.
RTCK
100
I/O
RTCK —
JTAG interface control signal.
Note:
LOW on this pin while RESET is LOW enables ETM pins (P2.9:0) to operate as
Trace port after reset.
RSTOUT
14
O
RSTOUT —
LOW on this pin indicates LPC2364/66/68 being in Reset state.
RESET
17
I
External reset input:
A LOW on this pin resets the device, causing I/O ports and
peripherals to take on their default states, and processor execution to begin at address
0. TTL with hysteresis, 5 V tolerant.
X1
22
I
Input to the oscillator circuit and internal clock generator circuits.
X2
23
O
Output from the oscillator amplifier.
RTCX1
16
I
Input to the RTC oscillator circuit.
RTCX2
18
O
Output from the RTC oscillator circuit.
V
SS
15, 31,
41, 55,
72, 97,
83
I
Ground:
0 V reference
V
SSA
11
I
Analog Ground:
0 V reference. This should nominally be the same voltage as V
SS
, but
should be isolated to minimize noise and error.
V
DD(3V3)
28, 54,
71, 96,
I
3.3 V Power Supply:
This is the power supply voltage for the I/O ports.
V
DCDC(3V3)
13, 42,
84
I
3.3 V DC-to-DC Power Supply:
This is the power supply for the on-chip DC-to-DC
converter only. If the DC-to-DC is not used, these pins must be unconnected.
V
DDA
10
I
Analog 3.3 V Power Supply:
This should be nominally the same voltage as V
DD
but
should be isolated to minimize noise and error. This voltage is used to power the ADC
and DAC.
VREF
12
I
ADC Reference:
This should be nominally the same voltage as V
DD
but should be
isolated to minimize noise and error. Level on this pin is used as a reference for ADC
and DAC.
VBAT
19
I
RTC Power Supply:
3.3 V on this pin supplies the power to the RTC.
Table 3.
Pin description
…continued
Symbol
Pin
location
Type
Description
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