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| 型號： | LPC2366FB100 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Single-chip 16-bit/32-bit microcontrollers; up to 512 kB flash with ISP/IAP, Ethernet, USB 2.0, CAN, and 10-bit ADC/DAC |
| 中文描述： | 單芯片16-bit/32-bit微控制器，高達512的ISP /國際檢察官聯(lián)合會，以太網(wǎng)，USB 2.0，CAN和10 kB閃存位的ADC / DAC |
| 文件頁數(shù)： | 25/48頁 |
| 文件大?。?/td> | 377K |
| 代理商： | LPC2366FB100 |
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LPC2364_66_68_1
Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Preliminary data sheet
Rev. 01 — 22 September 2006
25 of 48
Philips Semiconductors
LPC2364/2366/2368
Fast communication chip
With double edge controlled PWM outputs, specific match registers control the rising and
falling edge of the output. This allows both positive going PWM pulses (when the rising
edge occurs prior to the falling edge), and negative going PWM pulses (when the falling
edge occurs prior to the rising edge).
7.21.1
Features
LPC2364/66/68 has one PWM block with Counter or Timer operation (may use the
peripheral clock or one of the capture inputs as the clock source).
Seven match registers allow up to 6 single edge controlled or 3 double edge
controlled PWM outputs, or a mix of both types. The match registers also allow:
–
Continuous operation with optional interrupt generation on match.
–
Stop timer on match with optional interrupt generation.
–
Reset timer on match with optional interrupt generation.
Supports single edge controlled and/or double edge controlled PWM outputs. Single
edge controlled PWM outputs all go high at the beginning of each cycle unless the
output is a constant low. Double edge controlled PWM outputs can have either edge
occur at any position within a cycle. This allows for both positive going and negative
going pulses.
Pulse period and width can be any number of timer counts. This allows complete
flexibility in the trade-off between resolution and repetition rate. All PWM outputs will
occur at the same repetition rate.
Double edge controlled PWM outputs can be programmed to be either positive going
or negative going pulses.
Match register updates are synchronized with pulse outputs to prevent generation of
erroneous pulses. Software must ‘release’ new match values before they can become
effective.
May be used as a standard timer if the PWM mode is not enabled.
A 32-bit Timer/Counter with a programmable 32-bit Prescaler.
7.22 Watchdog timer
The purpose of the Watchdog is to reset the microcontroller within a reasonable amount of
time if it enters an erroneous state. When enabled, the Watchdog will generate a system
reset if the user program fails to ‘feed’ (or reload) the Watchdog within a predetermined
amount of time.
7.22.1
Features
Internally resets chip if not periodically reloaded.
Debug mode.
Enabled by software but requires a hardware reset or a Watchdog reset/interrupt to be
disabled.
Incorrect/Incomplete feed sequence causes reset/interrupt if enabled.
Flag to indicate Watchdog reset.
Programmable 32-bit timer with internal pre-scaler.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LPC2366FBD100 | 制造商:NXP Semiconductors 功能描述:MCU 32BIT ARM7 10/100 USB CAN 制造商:NXP Semiconductors 功能描述:MCU 32BIT ARM7, 10/100, USB, CAN 制造商:NXP Semiconductors 功能描述:MCU 32BIT ARM7, 10/100, USB, CAN, Controller Family/Series:LPC23xx, Core Size:32 制造商:NXP Semiconductors 功能描述:IC, 32BIT MCU, ARM7, 72MHZ, LQFP-100, Controller Family/Series:(ARM7), Core Size:32bit, No. of I/O's:70, Supply Voltage Min:3V, Supply Voltage Max:3.6V, Digital IC Case Style:LQFP, No. of Pins:100, Program Memory Size:256KB , RoHS Compliant: Yes |
| LPC2366FBD100,551 | 功能描述:ARM微控制器 - MCU ARM7 256KF/USB/ENET RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:72 MHz 程序存儲器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT |
| LPC2366FBD100/CP3298551 | 制造商:NXP 功能描述: 制造商:NXP Semiconductors 功能描述: |
| LPC2366FBD100551 | 制造商:NXP Semiconductors 功能描述:IC 32BIT MCU 72MHZ LQFP-100 |
| LPC2366FBD100CP329 | 制造商:NXP 功能描述: 制造商:NXP Semiconductors 功能描述: |
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