參數(shù)資料
型號(hào)： LPC2366
廠(chǎng)商： NXP Semiconductors N.V.
英文描述： Single-chip 16-bit/32-bit microcontrollers; up to 512 kB flash with ISP/IAP, Ethernet, USB 2.0, CAN, and 10-bit ADC/DAC
中文描述： 單芯片16-bit/32-bit微控制器，高達(dá)512的ISP /國(guó)際檢察官聯(lián)合會(huì)，以太網(wǎng)，USB 2.0，CAN和10 kB閃存位的ADC / DAC
文件頁(yè)數(shù)： 23/48頁(yè)
文件大?。?/td> 377K
代理商： LPC2366
LPC2364_66_68_1
Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Preliminary data sheet
Rev. 01 — 22 September 2006
23 of 48
Philips Semiconductors
LPC2364/2366/2368
Fast communication chip
The I
2
C-bus implemented in LPC2364/66/68 supports bit rates up to 400 kbit/s (Fast
I
2
C-bus).
7.18.1
Features
I
2
C0 is a standard I
2
C compliant bus interface with open-drain pins.
I
2
C1 and I
2
C2 use standard I/O pins and do not support powering off of individual
devices connected to the same bus lines
Easy to configure as master, slave, or master/slave.
Programmable clocks allow versatile rate control.
Bidirectional data transfer between masters and slaves.
Multi-master bus (no central master).
Arbitration between simultaneously transmitting masters without corruption of serial
data on the bus.
Serial clock synchronization allows devices with different bit rates to communicate via
one serial bus.
Serial clock synchronization can be used as a handshake mechanism to suspend and
resume serial transfer.
The I
2
C-bus can be used for test and diagnostic purposes.
7.19 I
2
S-bus serial I/O controllers
The I
2
S-bus provides a standard communication interface for digital audio applications.
The I
2
S-bus specification defines a 3-wire serial bus using one data line, one clock line,
and one word select signal. The basic I
2
S connection has one master, which is always the
master, and one slave. The I
2
S interface on the LPC2364/66/68 provides a separate
transmit and receive channel, each of which can operate as either a master or a slave.
7.19.1
Features
The interface has separate input output channels each of which can operate in master
or slave mode.
Capable of handling 8-bit, 16-bit, and 32-bit word sizes.
Mono and stereo audio data supported.
The sampling frequency can range from 16 kHz to 48 kHz (16, 22.05, 32, 44.1,
48) kHz.
Configurable Word Select period in master mode (separately for I
2
S input and output).
Two 8 word FIFO data buffers are provided, one for transmit and one for receive.
Generates interrupt requests when buffer levels cross a programmable boundary.
Two DMA requests, controlled by programmable buffer levels. These are connected
to the General Purpose DMA block.
Controls include reset, stop and mute options separately for I
2
S input and I
2
S output.
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LPC2366FB100 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:Single-chip 16-bit/32-bit microcontrollers; up to 512 kB flash with ISP/IAP, Ethernet, USB 2.0, CAN, and 10-bit ADC/DAC
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LPC2366FBD100,551 功能描述:ARM微控制器 - MCU ARM7 256KF/USB/ENET RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線(xiàn)寬度:32 bit 最大時(shí)鐘頻率:72 MHz 程序存儲(chǔ)器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT
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