- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄385497 > LPC2212FBD144 (NXP Semiconductors N.V.) Single-chip 16-32-bit ARM microcontrollers; 128-256 kB ISP-IAP flash with 10-bit ADC and external memory interface PDF資料下載
參數(shù)資料
| 型號： | LPC2212FBD144 |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 數(shù)學(xué)處理器 |
| 英文描述： | Single-chip 16-32-bit ARM microcontrollers; 128-256 kB ISP-IAP flash with 10-bit ADC and external memory interface |
| 封裝： | LPC2212FBD144/01<SOT486-1 (LQFP144)|<<http://www.nxp.com/packages/SOT486-1.html<1<Always Pb-free,;LPC2214FBD144/01<SOT486-1 (LQFP144)|<<http://www.nxp.com/packages/SOT486 |
| 文件頁數(shù)： | 8/47頁 |
| 文件大?。?/td> | 337K |
| 代理商： | LPC2212FBD144 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁當(dāng)前第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁
LPC2212_2214
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 5 — 14 June 2011
8 of 47
NXP Semiconductors
LPC2212/2214
Single-chip 16/32-bit ARM microcontrollers
P0[30]/AIN3/EINT3/
CAP0[0]
33
I
I
I
I/O
AIN3 —
ADC, input 3. This analog input is always connected to its pin.
EINT3 —
External interrupt 3 input.
CAP0[0] —
Capture input for Timer 0, channel 0.
Port 1 is a 32-bit bidirectional I/O port with individual direction controls for
each bit. The operation of port 1 pins depends upon the pin function selected
via the Pin Connect Block.
Pins 2 through 15 of port 1 are not available.
LOW-active Chip Select 0 signal.
(Bank 0 addresses range 0x8000 0000 to 0x80FF FFFF)
LOW-active Output Enable signal.
Trace Packet, bit 0. Standard I/O port with internal pull-up.
Trace Packet, bit 1. Standard I/O port with internal pull-up.
Trace Packet, bit 2. Standard I/O port with internal pull-up.
Trace Packet, bit 3. Standard I/O port with internal pull-up.
Trace Synchronization; standard I/O port with internal pull-up.
Note: LOW on this pin while RESET is LOW, enables pins P1[25:16] to
operate as Trace port after reset.
Pipeline Status, bit 0. Standard I/O port with internal pull-up.
Pipeline Status, bit 1. Standard I/O port with internal pull-up.
P1[0] to P1[31]
P1[0]/CS0
91
O
P1[1]/OE
P1[16]/TRACEPKT0
P1[17]/TRACEPKT1
P1[18]/TRACEPKT2
P1[19]/TRACEPKT3
P1[20]/TRACESYNC
90
34
24
15
7
102
O
O
O
O
O
O
P1[21]/PIPESTAT0
P1[22]/PIPESTAT1
95
86
O
O
P1[23]/PIPESTAT2
P1[24]/TRACECLK
P1[25]/EXTIN0
P1[26]/RTCK
82
70
60
52
O
O
I
I/O
Pipeline Status, bit 2. Standard I/O port with internal pull-up.
Trace Clock. Standard I/O port with internal pull-up.
External Trigger Input. Standard I/O with internal pull-up.
Returned Test Clock output. Extra signal added to the JTAG port. Assists
debugger synchronization when processor frequency varies. Bidirectional pin
with internal pull-up.
Note: LOW on this pin while RESET is LOW, enables pins P1[31:26] to
operate as Debug port after reset.
Test Data out for JTAG interface.
Test Data in for JTAG interface.
Test Clock for JTAG interface. This clock must be slower than
1
6
of the CPU
clock (CCLK) for the JTAG interface to operate.
Test Mode Select for JTAG interface.
Test Reset for JTAG interface.
Port 2 is a 32-bit bidirectional I/O port with individual direction controls for
each bit. The operation of port 2 pins depends upon the pin function selected
via the Pin Connect Block.
External memory data line 0.
External memory data line 1.
External memory data line 2.
External memory data line 3.
External memory data line 4.
External memory data line 5.
External memory data line 6.
P1[27]/TDO
P1[28]/TDI
P1[29]/TCK
144
140
126
O
I
I
P1[30]/TMS
P1[31]/TRST
P2[0] to P2[31]
113
43
I
I
I/O
P2[0]/D0
P2[1]/D1
P2[2]/D2
P2[3]/D3
P2[4]/D4
P2[5]/D5
P2[6]/D6
98
105
106
108
109
114
115
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Table 3.
Symbol
Pin description
…continued
Pin
Type Description
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LPC2214FBD144 | Single-chip 16-32-bit ARM microcontrollers; 128-256 kB ISP-IAP flash with 10-bit ADC and external memory interface |
| LPC2290FBD144 | 16-32-bit ARM microcontroller with CAN, 10-bit ADC and external memory interface |
| LPC2292FBD144 | 16-32-bit ARM microcontrollers; 256 kB ISP-IAP flash with CAN, 10-bit ADC and external memory interface |
| LPC2292FET144 | 16-32-bit ARM microcontrollers; 256 kB ISP-IAP flash with CAN, 10-bit ADC and external memory interface |
| LPC2294HBD144 | 16-32-bit ARM microcontrollers; 256 kB ISP-IAP flash with CAN, 10-bit ADC and external memory interface |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LPC2212FBD144,551 | 功能描述:ARM微控制器 - MCU PREF PART LPC2212FBD144/01-S RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:72 MHz 程序存儲器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT |
| LPC2212FBD144/00 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:16/32-bit ARM microcontrollers; 128/256 kB ISP/IAP flash with 10-bit ADC and external memory interface |
| LPC2212FBD144/01 | 制造商:NXP Semiconductors 功能描述:MCU, 16BIT/32BIT, 60MHZ, LQFP-144 制造商:NXP Semiconductors 功能描述:MCU, 16BIT/32BIT, 60MHZ, LQFP-144, Controller Family/Series:LPC2200, Core Size:16bit / 32bit, No. of I/O's:112, Supply Voltage Min:1.65V, Supply Voltage Max:1.95V, Digital IC Case Style:LQFP, No. of Pins:144, Program Memory |
| LPC2212FBD144/01,5 | 功能描述:ARM微控制器 - MCU ARM7 128KF/16KR/ADC RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:72 MHz 程序存儲器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT |
| LPC2212FBD144/01,551 | 制造商:PHILIPS_SEMI 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。