參數(shù)資料
型號(hào): LPC2132
廠商: NXP Semiconductors N.V.
英文描述: Single-chip 16/32-bit microcontrollers; 32/64/512 kB ISP/IAP Flash with 10-bit ADC and DAC
中文描述: 16/32位 單片微控制器;有10位數(shù)模/模數(shù)轉(zhuǎn)換,32/64/512kB的ISP/IAP flash閃存
文件頁(yè)數(shù): 28/41頁(yè)
文件大小: 190K
代理商: LPC2132
9397 750 14868
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Preliminary data sheet
Rev. 02 — 15 April 2005
28 of 41
Philips Semiconductors
LPC2131/2132/2134/2136/2138
Single-chip 16/32-bit microcontrollers
6.22.1
EmbeddedICE
Standard ARM EmbeddedICE logic provides on-chip debug support. The debugging of
the target system requires a host computer running the debugger software and an
EmbeddedICE protocol convertor. EmbeddedICE protocol convertor converts the Remote
Debug Protocol commands to the JTAG data needed to access the ARM core.
The ARM core has a Debug Communication Channel function built-in. The debug
communication channel allows a program running on the target to communicate with the
host debugger or another separate host without stopping the program flow or even
entering the debug state. The debug communication channel is accessed as a
co-processor 14 by the program running on the ARM7TDMI-S core. The debug
communication channel allows the JTAG port to be used for sending and receiving data
without affecting the normal program flow. The debug communication channel data and
control registers are mapped in to addresses in the EmbeddedICE logic.
6.22.2
Embedded trace
Since the LPC2131/2132/2134/2136/2138 have significant amounts of on-chip memory, it
is not possible to determine how the processor core is operating simply by observing the
external pins. The Embedded Trace Macrocell provides real-time trace capability for
deeply embedded processor cores. It outputs information about processor execution to
the trace port.
The ETM is connected directly to the ARM core and not to the main AMBA system bus. It
compresses the trace information and exports it through a narrow trace port. An external
trace port analyzer must capture the trace information under software debugger control.
Instruction trace (or PC trace) shows the flow of execution of the processor and provides a
list of all the instructions that were executed. Instruction trace is significantly compressed
by only broadcasting branch addresses as well as a set of status signals that indicate the
pipeline status on a cycle by cycle basis. Trace information generation can be controlled
by selecting the trigger resource. Trigger resources include address comparators,
counters and sequencers. Since trace information is compressed the software debugger
requires a static image of the code being executed. Self-modifying code can not be traced
because of this restriction.
6.22.3
RealMonitor
RealMonitor is a configurable software module, developed by ARM Inc., which enables
real time debug. It is a lightweight debug monitor that runs in the background while users
debug their foreground application. It communicates with the host using the DCC, which is
present in the EmbeddedICE logic. The LPC2131/2132/2134/2136/2138 contain a
specific configuration of RealMonitor software programmed into the on-chip Flash
memory.
相關(guān)PDF資料
PDF描述
LPC2142 Single-chip 16-bit/32-bit microcontrollers; up to 512 kB flash with ISP/IAP, USB 2.0 full-speed device, 10-bit ADC and DAC
LPC2141 Single-chip 16-bit/32-bit microcontrollers; up to 512 kB flash with ISP/IAP, USB 2.0 full-speed device, 10-bit ADC and DAC
LPC2144 Single-chip 16-bit/32-bit microcontrollers; up to 512 kB flash with ISP/IAP, USB 2.0 full-speed device, 10-bit ADC and DAC
LPC2146 Single-chip 16-bit/32-bit microcontrollers; up to 512 kB flash with ISP/IAP, USB 2.0 full-speed device, 10-bit ADC and DAC
LPC2148 Single-chip 16-bit/32-bit microcontrollers; up to 512 kB flash with ISP/IAP, USB 2.0 full-speed device, 10-bit ADC and DAC
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