參數(shù)資料
型號: LPC2131FBD64
廠商: NXP Semiconductors N.V.
元件分類: 數(shù)學(xué)處理器
英文描述: Single-chip 16-32-bit microcontrollers; 32-64-128-256-512 kB ISP-IAP flash with 10-bit ADC and DAC
封裝: LPC2131FBD64/01<SOT314-2 (LQFP64)|<<http://www.nxp.com/packages/SOT314-2.html<1<Always Pb-free,;LPC2131FBD64/01<SOT314-2 (LQFP64)|<<http://www.nxp.com/packages/SOT314-2.h
文件頁數(shù): 11/45頁
文件大?。?/td> 381K
代理商: LPC2131FBD64
LPC2131_32_34_36_38
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 5.1 — 29 July 2011
11 of 45
NXP Semiconductors
LPC2131/32/34/36/38
Single-chip 16/32-bit microcontrollers
P0.23
P0.25/AD0.4/
AOUT
58
[1]
9
[5]
I/O
I
O
I
I
I
O
I
I
O
I
I
O
I
I
I
O
General purpose digital input/output pin.
AD0.4 —
ADC 0, input 4. This analog input is always connected to its pin.
AOUT —
DAC output. Not available in LPC2131.
AD0.5 —
ADC 0, input 5. This analog input is always connected to its pin.
AD0.0 —
ADC 0, input 0. This analog input is always connected to its pin.
CAP0.1 —
Capture input for Timer 0, channel 1.
MAT0.1 —
Match output for Timer 0, channel 1.
AD0.1 —
ADC 0, input 1. This analog input is always connected to its pin.
CAP0.2 —
Capture input for Timer 0, channel 2.
MAT0.2 —
Match output for Timer 0, channel 2.
AD0.2 —
ADC 0, input 2. This analog input is always connected to its pin.
CAP0.3 —
Capture input for Timer 0, channel 3.
MAT0.3 —
Match output for Timer 0, channel 3.
AD0.3 —
ADC 0, input 3. This analog input is always connected to its pin.
EINT3 —
External interrupt 3 input.
CAP0.0 —
Capture input for Timer 0, channel 0.
General purpose digital output only pin.
Important:
This pin MUST NOT be externally pulled LOW when RESET pin is LOW or
the JTAG port will be disabled.
Port 1:
Port 1 is a 32-bit bidirectional I/O port with individual direction controls for each
bit. The operation of port 1 pins depends upon the pin function selected via the pin
connect block. Pins 0 through 15 of port 1 are not available.
TRACEPKT0 —
Trace Packet, bit 0. Standard I/O port with internal pull-up.
P0.26/AD0.5
P0.27/AD0.0/
CAP0.1/MAT0.1
10
[4]
11
[4]
P0.28/AD0.1/
CAP0.2/MAT0.2
13
[4]
P0.29/AD0.2/
CAP0.3/MAT0.3
14
[4]
P0.30/AD0.3/
EINT3/CAP0.0
15
[4]
P0.31
17
[6]
P1.0 to P1.31
I/O
P1.16/
TRACEPKT0
P1.17/
TRACEPKT1
P1.18/
TRACEPKT2
P1.19/
TRACEPKT3
P1.20/
TRACESYNC
16
[6]
O
12
[6]
O
TRACEPKT1 —
Trace Packet, bit 1. Standard I/O port with internal pull-up.
8
[6]
O
TRACEPKT2 —
Trace Packet, bit 2. Standard I/O port with internal pull-up.
4
[6]
O
TRACEPKT3 —
Trace Packet, bit 3. Standard I/O port with internal pull-up.
48
[6]
O
TRACESYNC —
Trace Synchronization. Standard I/O port with internal pull-up. LOW
on TRACESYNC while RESET is LOW enables pins P1.25:16 to operate as Trace port
after reset.
PIPESTAT0 —
Pipeline Status, bit 0. Standard I/O port with internal pull-up.
P1.21/
PIPESTAT0
P1.22/
PIPESTAT1
P1.23/
PIPESTAT2
P1.24/
TRACECLK
P1.25/EXTIN0
44
[6]
O
40
[6]
O
PIPESTAT1 —
Pipeline Status, bit 1. Standard I/O port with internal pull-up.
36
[6]
O
PIPESTAT2 —
Pipeline Status, bit 2. Standard I/O port with internal pull-up.
32
[6]
O
TRACECLK —
Trace Clock. Standard I/O port with internal pull-up.
28
[6]
I
EXTIN0 —
External Trigger Input. Standard I/O with internal pull-up.
Table 3.
Symbol
Pin description
…continued
Pin
Type
Description
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