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參數(shù)資料
| 型號： | LPC2106FHN48 |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 數(shù)學處理器 |
| 英文描述： | Single-chip 32-bit microcontrollers; 128 kB ISP-IAP flash with 16-32-64 kB RAM |
| 封裝： | LPC2104FBD48/01<SOT313|<<<1<Always Pb-free,;LPC2105FBD48/01<SOT313|<<<1<Always Pb-free,;LPC2106FBD48/01<SOT313-2 (LQFP48)|<<http://www.nxp.com/packages/SOT313 |
| 文件頁數(shù)： | 16/41頁 |
| 文件大小： | 188K |
| 代理商： | LPC2106FHN48 |
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LPC2104_2105_2106_7
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 07 — 20 June 2008
16 of 41
NXP Semiconductors
LPC2104/2105/2106
Single-chip 32-bit microcontrollers
6.9 General purpose parallel I/O
Device pins that are not connected to a specific peripheral function are controlled by the
GPIO registers. Pins may be dynamically configured as inputs or outputs. Separate
registers allow setting or clearing any number of outputs simultaneously. The value of the
output register may be read back, as well as the current state of the port pins.
6.9.1
Features
Direction control of individual bits.
Separate control of output set and clear.
All I/O default to inputs after reset.
6.9.2
Features added with the Fast GPIO set of registers available on
LPC2104/2105/2106/01 only
Fast GPIO registers are relocated to the ARM local bus for the fastest possible I/O
timing, enabling port pin toggling up to 3.5 times faster than earlier LPC2000 devices.
Mask registers allow treating sets of port bits as a group, leaving other bits
unchanged.
All Fast GPIO registers are byte addressable.
Entire port value can be written in one instruction.
Ports are accessible via either the legacy group of registers (GPIOs) or the group of
registers providing accelerated port access (Fast GPIOs).
6.10 UARTs
The LPC2104/2105/2106 each contain two UARTs. One UART provides a full modem
control handshake interface, the other provides only transmit and receive data lines.
6.10.1
Features
16 byte Receive and Transmit FIFOs
Register locations conform to 16C550 industry standard
Receiver FIFO trigger points at 1 B, 4 B, 8 B, and 14 B
Built-in baud rate generator
25:24
P0.28
0
0
0
0
0
0
0
0
0
1
0
1
0
1
0
1
GPIO Port 0.28
TMS
GPIO Port 0.29
TCK
GPIO Port 0.30
TDI
GPIO Port 0.31
TDO
0
27:26
P0.29
0
29:28
P0.30
0
31:30
P0.31
0
Table 7.
PINSEL1
Pin function select register 1 (PINSEL1 - 0xE002 C004)
…continued
Pin name
Value
Function
Value after
reset
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相關代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LPC2106FHN48,551 | 功能描述:ARM微控制器 - MCU ARM7 128KF/64KR/I2C RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:72 MHz 程序存儲器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風格:SMD/SMT |
| LPC2106FHN48/00 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Single-chip 32-bit microcontrollers; 128 kB ISP/IAP flash with 16/32/64 kB RAM |
| LPC2106FHN48/01 | 制造商:NXP Semiconductors 功能描述:MCU, 16BIT/32BIT, 60MHZ, HVQFN-48 制造商:NXP Semiconductors 功能描述:MCU, 16BIT/32BIT, 60MHZ, HVQFN-48, Controller Family/Series:LPC2100, Core Size:1 制造商:NXP Semiconductors 功能描述:MCU, 16BIT/32BIT, 60MHZ, HVQFN-48, Controller Family/Series:LPC2100, Core Size:16bit / 32bit, No. of I/O's:32, Supply Voltage Min:1.65V, Supply Voltage Max:1.95V, Digital IC Case Style:HVQFN, No. of Pins:48, Program Memory |
| LPC2106FHN48/01,55 | 功能描述:ARM微控制器 - MCU 128K FL/64K RAM/2 UART/I2C/SPI RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:72 MHz 程序存儲器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風格:SMD/SMT |
| LPC2106FHN48/0155 | 制造商:NXP Semiconductors 功能描述:LPC2106FHN48/HVQFN48/TRAYBDP// |
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