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| 型號： | LPC2106FBD48 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Single-chip 32-bit microcontrollers; 128 kB ISP-IAP flash with 16-32-64 kB RAM |
| 中文描述： | 32-BIT, FLASH, 60 MHz, RISC MICROCONTROLLER, PQFP48 |
| 封裝： | 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT313-2, LQFP-48 |
| 文件頁數(shù)： | 18/41頁 |
| 文件大?。?/td> | 188K |
| 代理商： | LPC2106FBD48 |
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LPC2104_2105_2106_7
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 07 — 20 June 2008
18 of 41
NXP Semiconductors
LPC2104/2105/2106
Single-chip 32-bit microcontrollers
6.12 SPI serial I/O controller
The SPI is a full duplex serial interface, designed to be able to handle multiple masters
and slaves connected to a given bus. Only a single master and a single slave can
communicate on the interface during a given data transfer. During a data transfer the
master always sends a byte of data to the slave, and the slave always sends a byte of data
to the master.
6.12.1
Features
Compliant with Serial Peripheral Interface (SPI) specification.
Synchronous, serial, full duplex communication.
Combined SPI master and slave.
Maximum data bit rate of one eighth of the input clock rate.
6.12.2
Features available in LPC2104/2105/2106/01 only
Selectable transfer width of eight to 16 bit per frame.
When the SPI interface is used in Master mode, the SSEL pin is not needed (can be
used for a different function).
6.13 SSP controller (LPC2104/2015/2106/01 only)
The SSP is a controller capable of operation on a SPI, 4-wire SSI, or Microwire bus. It can
interact with multiple masters and slaves on the bus. Only a single master and a single
slave can communicate on the bus during a given data transfer. Data transfers are in
principle full duplex, with frames of four to 16 bits of data flowing from the master to the
slave and from the slave to the master.
Because the SSP and SPI peripherals share the same physical pins, it is not possible to
have both of these two peripherals active at the same time. Application can switch on the
fly from SPI to SSP and back.
6.13.1
Features
Compatible with Motorola’s SPI, Texas Instrument’s 4-wire SSI, and National
Semiconductor’s Microwire buses.
Synchronous serial communication.
Master or slave operation.
8-frame FIFOs for both transmit and receive.
Four to 16 bits per frame.
6.14 General purpose timers
The Timer is designed to count cycles of the peripheral clock (PCLK) and optionally
generate interrupts or perform other actions at specified timer values, based on four
match registers. It also includes up to four capture inputs to trap the timer value when an
input signal transitions, optionally generating an interrupt.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LPC2106FBD48,151 | 功能描述:ARM微控制器 - MCU ARM7 128KF/64KR/I2C RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:72 MHz 程序存儲器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT |
| LPC2106FBD48/00 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Single-chip 32-bit microcontrollers; 128 kB ISP/IAP flash with 16/32/64 kB RAM |
| LPC2106FBD48/01 | 制造商:NXP Semiconductors 功能描述:IC MCU 32BIT 128K FLASH 48LQFP 制造商:NXP Semiconductors 功能描述:IC, MCU, 32BIT, 128K FLASH, 48LQFP 制造商:NXP Semiconductors 功能描述:IC, MCU, 32BIT, 128K FLASH, 48LQFP; Controller Family/Series:ARM7; Core Size:32bit; No. of I/O's:32; Supply Voltage Min:1.65V; Supply Voltage Max:1.95V; Digital IC Case Style:LQFP; No. of Pins:48; Program Memory Size:128KB; RAM ;RoHS Compliant: Yes |
| LPC2106FBD48/01,15 | 功能描述:ARM微控制器 - MCU 128K FL/64K RAM/2 UART/I2C/SPI RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:72 MHz 程序存儲器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT |
| LPC2106FBD48/01,151 | 制造商:NXP Semiconductors 功能描述:PHALPC2106FBD48/01.151 SINGLE-CHIP 32-BI |
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