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參數(shù)資料
| 型號(hào)： | LPC2105BBD48,151 |
| 廠商： | NXP Semiconductors |
| 文件頁(yè)數(shù)： | 11/41頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC ARM7 MCU FLASH 128K 48-LQFP |
| 標(biāo)準(zhǔn)包裝： | 250 |
| 系列： | LPC2100 |
| 核心處理器： | ARM7 |
| 芯體尺寸： | 16/32-位 |
| 速度： | 60MHz |
| 連通性： | I²C，Microwire，SPI，SSI，SSP，UART/USART |
| 外圍設(shè)備： | POR，PWM，WDT |
| 輸入/輸出數(shù)： | 32 |
| 程序存儲(chǔ)器容量： | 128KB（128K x 8） |
| 程序存儲(chǔ)器類型： | 閃存 |
| RAM 容量： | 32K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 1.65 V ~ 3.6 V |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | 0°C ~ 70°C |
| 封裝/外殼： | 48-LQFP |
| 包裝： | 托盤 |
| 配用： | 568-1756-ND - BOARD EVAL FOR LPC210X ARM MCU |
| 其它名稱： | 568-2242 935273747151 LPC2105BBD48-S |
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LPC2104_2105_2106_7
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 07 — 20 June 2008
19 of 41
NXP Semiconductors
LPC2104/2105/2106
Single-chip 32-bit microcontrollers
6.14.1 Features
A 32-bit Timer/Counter with a programmable 32-bit Prescaler.
Up to four (Timer 1) and three (Timer 0) 32-bit capture channels, that can take a
snapshot of the timer value when an input signal transitions. A capture event may also
optionally generate an interrupt.
Four 32-bit match registers that allow:
– Continuous operation with optional interrupt generation on match.
– Stop timer on match with optional interrupt generation.
– Reset timer on match with optional interrupt generation.
Up to four (Timer 1) and three (Timer 0) external outputs corresponding to match
registers, with the following capabilities:
– Set LOW on match.
– Set HIGH on match.
– Toggle on match.
– Do nothing on match.
6.14.2 Features available in LPC2104/2105/2106/01 only
The LPC2104/2105/2106/01 can count external events on one of the capture inputs if the
external pulse lasts at least one half of the period of the PCLK. In this conguration,
unused capture lines can be selected as regular timer capture inputs or used as external
interrupts.
Timer can count cycles of either the peripheral clock (PCLK) or an externally supplied
clock.
When counting cycles of an externally supplied clock, only one of the timer’s capture
inputs can be selected as the timer’s clock. The rate of such a clock is limited to
PCLK
4. Duration of HIGH/LOW levels on the selected CAP input cannot be shorter
than 1
(2PCLK).
6.15 Watchdog timer
The purpose of the Watchdog is to reset the microcontroller within a reasonable amount of
time if it enters an erroneous state. When enabled, the Watchdog will generate a system
reset if the user program fails to ‘feed’ (or reload) the Watchdog within a predetermined
amount of time.
6.15.1 Features
Internally resets chip if not periodically reloaded.
Debug mode.
Enabled by software but requires a hardware reset or a watchdog reset/interrupt to be
disabled.
Incorrect/Incomplete feed sequence causes reset/interrupt if enabled.
Flag to indicate watchdog reset.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LPC2105FBD48 | 制造商:NXP Semiconductors 功能描述:32BIT MCU ARM7 128K FLASH 48LQFP 制造商:NXP Semiconductors 功能描述:32BIT MCU, ARM7, 128K FLASH, 48LQFP |
| LPC2105FBD48/00 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Single-chip 32-bit microcontrollers; 128 kB ISP/IAP flash with 16/32/64 kB RAM |
| LPC2105FBD48/01 | 制造商:NXP Semiconductors 功能描述:MCU, 16BIT/32BIT, 60MHZ, LQFP-48 制造商:NXP Semiconductors 功能描述:MCU, 16BIT/32BIT, 60MHZ, LQFP-48, Controller Family/Series:LPC2100, Core Size:16bit / 32bit, No. of I/O's:32, Supply Voltage Min:1.65V, Supply Voltage Max:1.95V, Digital IC Case Style:LQFP, No. of Pins:48, Program Memory Size:128KB, |
| LPC2105FBD48/01,15 | 功能描述:ARM微控制器 - MCU 128K FL/32K RAM/2 UART/I2C/SPI RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:72 MHz 程序存儲(chǔ)器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT |
| LPC2106 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Single-chip 32-bit microcontrollers; 128 kB ISP/IAP flash with 16/32/64 kB RAM |
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