參數(shù)資料
型號: LPC1343FBD48,151
廠商: NXP Semiconductors
文件頁數(shù): 60/74頁
文件大?。?/td> 0K
描述: IC MCU 32BIT 32KB FLASH 48LQFP
產(chǎn)品培訓(xùn)模塊: LPCXpresso
特色產(chǎn)品: LPC1300 Series Cortex-M3 MCUs
標準包裝: 250
系列: LPC13xx
核心處理器: ARM? Cortex?-M3
芯體尺寸: 32-位
速度: 72MHz
連通性: I²C,Microwire,SPI,SSI,SSP,UART/USART,USB
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,WDT
輸入/輸出數(shù): 40
程序存儲器容量: 32KB(32K x 8)
程序存儲器類型: 閃存
RAM 容量: 8K x 8
電壓 - 電源 (Vcc/Vdd): 2 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 48-LQFP
包裝: 托盤
配用: 622-1005-ND - USB IN-CIRCUIT PROG ARM7 LPC2K
其它名稱: 568-4945
935289652151
LPC1311_13_42_43
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 5 — 6 June 2012
63 of 74
NXP Semiconductors
LPC1311/13/42/43
32-bit ARM Cortex-M3 microcontroller
11.5 Reset pad configuration
11.6 ADC usage notes
The following guidelines show how to increase the performance of the ADC in a noisy
environment beyond the ADC specifications listed in Table 8:
The ADC input trace must be short and as close as possible to the LPC1311/13/42/43
chip.
The ADC input traces must be shielded from fast switching digital signals and noisy
power supply lines.
Because the ADC and the digital core share the same power supply, the power supply
line must be adequately filtered.
To improve the ADC performance in a very noisy environment, put the device in Sleep
mode during the ADC conversion.
Fig 37. Reset pad configuration
VSS
reset
002aaf274
VDD
Rpu
ESD
20 ns RC
GLITCH FILTER
PIN
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