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| 型號： | LPC1225FBD64/301,1 |
| 廠商： | NXP Semiconductors |
| 文件頁數(shù)： | 37/61頁 |
| 文件大小： | 0K |
| 描述： | MCU 32BIT 64K FLASH 8K 64-LQFP |
| 產(chǎn)品培訓(xùn)模塊： | LPC1200 Series for Industrial Control |
| 特色產(chǎn)品： | LPC122x Cortex-M0 Microcontrollers |
| 標(biāo)準(zhǔn)包裝： | 160 |
| 系列： | LPC1200 |
| 核心處理器： | ARM? Cortex?-M0 |
| 芯體尺寸： | 32-位 |
| 速度： | 45MHz |
| 連通性： | I²C，IrDA，Microwire，SPI，SSI，SSP，UART/USART |
| 外圍設(shè)備： | 欠壓檢測/復(fù)位，DMA，POR，WDT |
| 輸入/輸出數(shù)： | 55 |
| 程序存儲器容量： | 64KB（64K x 8） |
| 程序存儲器類型： | 閃存 |
| RAM 容量： | 8K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 3 V ~ 3.6 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 8x10b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 64-LQFP |
| 包裝： | 托盤 |
| 其它名稱： | 568-5159 LPC1225FBD64/301 |
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LPC122X
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 2 — 26 August 2011
42 of 61
NXP Semiconductors
LPC122x
32-bit ARM Cortex-M0 microcontroller
10.4 ADC characteristics
[1]
Typical ratings are not guaranteed. The values listed are at room temperature (25
C), nominal supply
voltages.
[2]
Conditions: VSS =0V, VDD(3V3) =3.3 V.
[3]
The ADC is monotonic, there are no missing codes.
[4]
The differential linearity error (ED) is the difference between the actual step width and the ideal step width.
See Figure 19.
[5]
The integral non-linearity (EL(adj)) is the peak difference between the center of the steps of the actual and
the ideal transfer curve after appropriate adjustment of gain and offset errors. See Figure 19.
[6]
The offset error (EO) is the absolute difference between the straight line which fits the actual curve and the
straight line which fits the ideal curve. See Figure 19.
[7]
The gain error (EG) is the relative difference in percent between the straight line fitting the actual transfer
curve after removing offset error, and the straight line which fits the ideal transfer curve. See Figure 19.
[8]
The absolute error (ET) is the maximum difference between the center of the steps of the actual transfer
curve of the non-calibrated ADC and the ideal transfer curve. See Figure 19.
[9]
Tamb = 25 C; maximum sampling frequency fs = 257 kHz and analog input capacitance Cia = 1 pF.
[10] Input resistance Ri depends on the sampling frequency fs: Ri = 1 / (fs Cia).
Table 9.
ADC static characteristics
Tamb = 40 C to +85 C unless otherwise specified; ADC frequency 9 MHz, VDD(3V3) = 3.0 V to
3.6 V.
Symbol
Parameter
Conditions
Min
Typ[1]
Max
Unit
VIA
analog input voltage
0
-
VDD(3V3)
V
Cia
analog input capacitance
-
1
pF
ED
differential linearity error
[2][3][4] --
1LSB
EL(adj)
integral non-linearity
[2][5] --
2.5
LSB
EO
offset error
[2][6] --
1LSB
EG
gain error
[2][7] --
3LSB
ET
absolute error
[2][8] --
3LSB
fc(ADC)
ADC conversion frequency
-
257
kHz
Ri
input resistance
[9][10] --
3.9
M
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