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參數(shù)資料
| 型號： | LP5952TL-1.2 |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 基準電壓源/電流源 |
| 英文描述： | 350mA Dual Rail Linear Regulator |
| 中文描述： | 1.2 V FIXED POSITIVE REGULATOR, PBGA5 |
| 封裝： | LEAD FREE, SMD, 5 PIN |
| 文件頁數(shù)： | 11/16頁 |
| 文件大?。?/td> | 3706K |
| 代理商： | LP5952TL-1.2 |
Application Hints
DUAL RAIL SUPPLY
The LP5952 requires two different supply voltages:
V
, the power input voltage, is regulated to the fixed output
voltage
V
BATT
, the bias input voltage, supplies internal circuitry.
It's important that V
does not exceed V
at any time. If
the device is used in the typical post regulation application as
shown in FIGURE 1, the sequencing of the two power sup-
plies is not an issue as V
supplies both, the DC-DC
regulator and the LP5952. The output voltage of the DC-DC
regulator will take some time to rise up and supply V
of
LP5952. In this application V
IN
will always ramp up more
slowly than V
BATT
.
In case V
is shorted to V
, the voltages at the two supply
pins will ramp up simultaneously causing no problem.
Only in applications with two independent supplies connected
to the LP5952 special care must be taken to guarantee that
V
IN
is always
≤
BATT
.
POWER DISSIPATION AND DEVICE OPERATION
The permissible power dissipation for any package is a mea-
sure of the capability of the device to pass heat from the power
source, the junctions of the IC, to the ultimate heat sink, the
ambient environment. Thus the power dissipation is depen-
dent on the ambient temperature and the thermal resistance
across the various interfaces between the die and ambient
air.
As stated in the electrical specification section, the allowable
power dissipation for the device in a given package can be
calculated using the equation:
P
D
= (T
J(MAX)
- T
A
) / θ
JA
With a
θ
= 95°C/W, the device in the 5 bump micro SMD
package returns a value of 1053mW with a maximum junction
temperature of 125°C at T
A
of 25°C or 421mW at T
A
of 85°C.
The actual power dissipation across the device can be esti-
mated by the following equation:
P
D
= (V
IN
- V
OUT
) * I
OUT
This establishes the relationship between the power dissipa-
tion allowed due to thermal consideration, the voltage drop
across the device, and the continuous current capability of the
device. These two equations should be used to determine the
optimum operating conditions for the device in the application.
As an example, to keep full load current capability of 350mA
for a 1.5V output voltage option at a high ambient temperature
of 85°C, V
IN
has to be kept
≤
2.7V:
V
IN
≤
P
D
/ I
OUT
+ V
OUT
= 421mW / 350mA + 1.5V = 2.7V.
The figure below shows the output current derating due to
these considerations:
20208508
FIGURE 6: Maximum Load Current vs V
IN
- V
OUT
, T
A
=
85°C, V
OUT
= 1.5V,
θ
JA
= 95°C/W
The typical contribution of the bias input voltage supply
V
BATT
to the power dissipation can be neglected:
P
D_VBATT
= V
BATT
* I
QVBATT
= 5.5V * 50μA = 0.275mW typical.
EXTERNAL CAPACITORS
As is common with most regulators, the LP5952 requires ex-
ternal capacitors to ensure stable operation. The LP5952 is
specifically designed for portable applications requiring mini-
mum board space and the smallest size components. These
capacitors must be correctly selected for good performance.
INPUT CAPACITOR
If the LP5952 is used stand alone, an input capacitor at V
is
required for stability. It is recommended that a 1.0μF capacitor
be connected between the LP5952 power voltage input pin
V
and ground (this capacitance value may be increased
without limit).
This capacitor must be located a distance of not more than 1
cm from the V
IN
pin and returned to a clean analogue ground.
Any good quality ceramic, tantalum, or film capacitor may be
used at the input.
A capacitor at V
is not required if the distance to the sup-
ply does not exceed 5cm.
If the device is used in the typical application as post regulator
after a DC-DC regulator, no input capacitors are required at
all as the capacitors of the DC-DC regulator (C
and C
)
are sufficient if both components are mounted close to each
other and a proper GND plane is used. If the distance between
the output capacitor of the DC-DC regulator and the V
pin
of the LP5952 is larger than 5cm, it's recommended to add
the mentioned input capacitor at V
IN
.
Important:
Tantalum capacitors can suffer catastrophic fail-
ures due to surge current when connected to a low-
impedance source of power (like a battery or a very large
capacitor). If a tantalum capacitor is used at the input, it must
be guaranteed by the manufacturer to have a surge current
rating sufficient for the application.
The ESR (Equivalent Series Resistance) of the input capac-
itor should be in the range of 3m
to 300m
. The tolerance
and temperature coefficient must be considered when select-
ing the capacitor to ensure the capacitance will remain
≥
470nF over the entire operating temperature range.
11
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LP5952TL-2.0 | 制造商:Texas Instruments 功能描述:LDO Regulator Pos 2V 0.35A 5-Pin uSMD T/R |
| LP5952TL-2.0/NOPB | 功能描述:低壓差穩(wěn)壓器 - LDO RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動電壓（最大值）:307 mV 輸出電流:1 A 負載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20 |
| LP5952TLX-0.7/NOPB | 功能描述:低壓差穩(wěn)壓器 - LDO RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動電壓（最大值）:307 mV 輸出電流:1 A 負載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20 |
| LP5952TLX-1.0/NOPB | 功能描述:低壓差穩(wěn)壓器 - LDO RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動電壓（最大值）:307 mV 輸出電流:1 A 負載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20 |
| LP5952TLX-1.2/NOPB | 功能描述:低壓差穩(wěn)壓器 - LDO RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動電壓（最大值）:307 mV 輸出電流:1 A 負載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20 |
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