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參數(shù)資料
| 型號： | LP5550 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | PowerWise Technology Compliant Energy Management Unit |
| 中文描述： | PowerWise技術(shù)兼容的能源管理單位 |
| 文件頁數(shù)： | 20/25頁 |
| 文件大?。?/td> | 1056K |
| 代理商： | LP5550 |
Operation Description
(Continued)
VOLTAGE SCALING
The LP5550 is designed to be used in a voltage scaling
system to lower the power dissipation of baseband or appli-
cation processors in mobile phones or other portable equip-
ment. By scaling supply voltage with the clock frequency of a
processor, dramatic power savings can be achieved. Two
types of voltage scaling are supported, dynamic voltage
scaling (DVS) and adaptive voltage scaling (AVS). DVS
systems switch between pre-characterized voltages which
are paired to clock frequencies used for frequency scaling in
the processor. AVS systems track the processor perfor-
mance and optimize the supply voltage to the required per-
formance. AVS is a closed loop system that provides pro-
cess and temperature compensation such that for any given
processor, temperature, or clock frequency, the minimum
supply voltage is delivered.
DIGITALLY CONTROLLED VOLTAGE SCALING
The LP5550 delivers fast, controlled voltage scaling tran-
sients with the help of a digital state machine. The state
machine automatically optimizes the control loop in the
LP5550 switching regulator to provide large signal transients
with minimal over- and undershoot. This is an important
characteristic for voltage scaling systems that rely on mini-
mal over- and undershoot to set voltages as low as possible
and save energy.
LARGE SIGNAL TRANSIENT RESPONSE
The switching converter in the LP5550 is designed to work in
a voltage scaling system. This requires that the converter
has a well controlled large signal transient response. Spe-
cifically, the under- and over-shoots have to be minimal or
zero while maintaining settling times less than 100 usec.
Typical response plots are shown in the Typical Performance
section.
PowerWise (TM) INTERFACE
To support DVS and AVS, the LP5550 is programmable via
the low power, 2 wire PowerWise Interface (PWI). This serial
interface controls the various voltages and states of all the
regulators in the LP5550. In particular, the switching regula-
tor voltage can be controlled between 0.6V and 1.2V in 128
steps (linear scaling). This high resolution voltage control
affords accurate temperature and process compensation in
AVS. The LDO voltages can also be set, however they are
not intended to be dynamic in operation. The LP5550 sup-
ports the full command set as described in PWI 1.0 specifi-
cation:
Core Voltage Adjust
Reset
Sleep
Shutdown
Wakeup
Register Read
Register Write
Authenticate
Synchronize
PWM/PFM OPERATION
The switching converter in the LP5550 has two modes of
operation: pulse width modulation (PWM) and pulse fre-
quency modulation (PFM). In PWM the converter switches at
1MHz. Each period can be split into two cycles. During the
first cycle, the high-side switch is on and the low-side switch
is off, therefore the inductor current is rising. In the second
cycle, the high-side switch is off and the low-side switch is on
causing the inductor current to decrease. The output ripple
voltage is lowest in PWM mode
Figure 7
. As the load current
decreases, the converter efficiency becoms worse due to the
increased percentage of overhead current needed to oper-
ate in PWM mode. The LP5550 can operate in PFM mode to
increase efficiency at low loads.
By default, the part will automatically transition into PFM
mode when either of two conditions occurs for a duration of
32 or more clock cycles:
A. The inductor valley current goes below 0 A
B. The peak PMOS switch current drops below the I
MODE
level:
During PFM operation, the converter positions the output
voltage slightly higher than the nominal output voltage during
PWM operation, allowing additional headroom for voltage
drop during a load transient from light to heavy load. The
PFM comparators sense the output voltage via the feedback
pin and control the switching of the output FETs such that the
output voltage ramps between 0.8% and 1.6% (typ) above
the nominal PWM output voltage. If the output voltage is
below the ‘high’ PFM comparator threshold, the PMOS
power switch is turned on. It remains on until the output
voltage exceeds the ‘high’ PFM threshold or the peak current
exceeds the I
level set for PFM mode. The peak current
in PFM mode is:
L
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相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LP5550SQ | PowerWise Technology Compliant Energy Management Unit |
| LP5550SQX | PowerWise Technology Compliant Energy Management Unit |
| LP5552 | PWI 2.0 and PowerWise⑩ Technology Compliant Energy Management Unit |
| LP5951MF-1.3 | Micropower, 150mA Low-Dropout CMOS Voltage Regulator |
| LP5951MF-3.0 | Micropower, 150mA Low-Dropout CMOS Voltage Regulator |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LP5550SQ | 功能描述:電池管理 RoHS:否 制造商:Texas Instruments 電池類型:Li-Ion 輸出電壓:5 V 輸出電流:4.5 A 工作電源電壓:3.9 V to 17 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:VQFN-24 封裝:Reel |
| LP5550SQ/NOPB | 功能描述:電池管理 RoHS:否 制造商:Texas Instruments 電池類型:Li-Ion 輸出電壓:5 V 輸出電流:4.5 A 工作電源電壓:3.9 V to 17 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:VQFN-24 封裝:Reel |
| LP5550SQX | 功能描述:電池管理 RoHS:否 制造商:Texas Instruments 電池類型:Li-Ion 輸出電壓:5 V 輸出電流:4.5 A 工作電源電壓:3.9 V to 17 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:VQFN-24 封裝:Reel |
| LP5550SQX/NOPB | 功能描述:電池管理 RoHS:否 制造商:Texas Instruments 電池類型:Li-Ion 輸出電壓:5 V 輸出電流:4.5 A 工作電源電壓:3.9 V to 17 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:VQFN-24 封裝:Reel |
| LP5551 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:PowerWise⑩ Technology Compliant Energy Management Unit |
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